ATtiny861 Automotive Atmel Corporation, ATtiny861 Automotive Datasheet - Page 75

• Manufacturer Part Number: ATtiny861 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny861 Automotive

• Flash (kbytes): 8 Kbytes
• Pin Count: 20
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 8
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 16
• Ext Interrupts: 16
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

14.5
Table 14-3.
14.5.1
14.5.2
7753F–AVR–01/11
Mode
0
1
2
3
4
Modes of Operation
Normal 8-bit Mode
Clear Timer on Compare Match (CTC) 8-bit Mode
ICEN0
0
0
0
1
1
Modes of operation
TCW0
0
0
1
0
1
The counter is incremented at each timer clock (clk
restarts from BOTTOM. The counting sequence is determined by the setting of the CTC0 bit
located in the Timer/Counter Control Register (TCCR0A). For more details about counting
sequences, see
internal clock source, selected by the Clock Select bits (CS02:0). When no clock source is
selected (CS02:0 = 0) the timer is stopped. However, the TCNT0 value can be accessed by the
CPU, regardless of whether clk
counter clear or count operations. The Timer/Counter Overflow Flag (TOV0) is set when the
counter reaches the maximum value and it can be used for generating a CPU interrupt.
The mode of operation is defined by the Timer/Counter Width (TCW0), Input Capture Enable
(ICEN0) and Wave Generation Mode (CTC0) bits in
ter A” on page
In the Normal 8-bit mode, see
until it overruns when it passes its maximum 8-bit value (MAX = 0xFF) and then restarts from the
bottom (0x00). The Overflow Flag (TOV0) will be set in the same timer clock cycle as the
TCNT0L becomes zero. The TOV0 Flag in this case behaves like a ninth bit, except that it is only
set, not cleared. However, combined with the timer overflow interrupt that automatically clears
the TOV0 Flag, the timer resolution can be increased by software. There are no special cases to
consider in the Normal 8-bit mode, a new counter value can be written anytime. The Output
Compare Unit can be used to generate interrupts at some given time.
In Clear Timer on Compare or CTC mode, see
used to manipulate the counter resolution. In CTC mode the counter is cleared to zero when the
counter value (TCNT0) matches the OCR0A. The OCR0A defines the top value for the counter,
hence also its resolution. This mode allows greater control of the Compare Match output fre-
quency. It also simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
increases until a Compare Match occurs between TCNT0 and OCR0A, and then counter
(TCNT0) is cleared.
CTC0
X
X
X
0
1
Normal 8-bit Mode
8-bit CTC
16-bit Mode
8-bit Input Capture Mode
16-bit Input Capture Mode
85.
“Modes of Operation” on page
Mode of Operation
Table 14-3
shows the different Modes of Operation.
T0
Table 14-3 on page
is present or not. A CPU write overrides (has priority over) all
ATtiny261/ATtiny461/ATtiny861
0xFF
OCR0A
0xFFFF
0xFF
0xFFFF
TOP Value
Table 14-3 on page
75. clk
“TCCR0A – Timer/Counter0 Control Regis-
75, the counter (TCNT0L) is incrementing
T0
Figure
T0
) until it passes its TOP value and then
can be generated from an external or
Update of OCRx at
14-2. The counter value (TCNT0)
Immediate
Immediate
Immediate
Immediate
Immediate
75, the OCR0A Register is
MAX (0xFFFF)
MAX (0xFFFF)
TOV Flag Set on
MAX (0xFF)
MAX (0xFF)
MAX (0xFF)
75