ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 112

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ATxmega16D4

Manufacturer Part Number
ATxmega16D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega16D4

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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11.13.8
11.13.9
11.13.10 INTCTRL - Interrupt Control Register
8210B–AVR–04/10
OUTTGL - Data Output Value Toggle Register
IN - Data Input Value Register
• Bit 7:0 - OUTCLR[7:0]: Data Output Value Clear
This register can be used instead of a Read-Modify-Write to set the output value on individual
pins to zero. Writing a one to a bit will clear the corresponding bit in the OUT register. Reading
this register will return the value in the OUT register.
• Bit 7:0 - OUTTGL[7:0]: Port Data Output Value Toggle
This register can be used instead of a Read-Modify-Write to toggle the output value on individual
pins. Writing a one to a bit will toggle the corresponding bit in the OUT register. Reading this reg-
ister will return the value in the OUT register.
• Bit 7:0 - IN[7:0]: Data Input Value
This register shows the value present on the pins if the digital input driver is enabled. INn shows
the value of pin n on the port.
• Bit 7:4 - Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 3:2/1:0 - INTnLVL[1:0]: Interrupt n Level
These bits enable interrupt request for port interrupt n and select the interrupt level as described
in
Bit
+0x07
Read/Write
Initial Value
Bit
+0x08
Read/Write
Initial Value
Bit
+0x09
Read/Write
Initial Value
Section 11. ”Interrupts and Programmable Multi-level Interrupt Controller” on page
R/W
R/W
7
0
7
0
7
R
0
R/W
R/W
6
0
6
0
6
R
0
R/W
R/W
5
0
R
5
0
5
0
R/W
R/W
4
0
R
4
0
4
0
OUTTGL[7:0]
IN[7:0]
R/W
R/W
R/W
3
0
3
0
3
0
INT1LVL[1:0]
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
INT0LVL[1:0]
XMEGA D
R/W
R/W
R/W
0
0
0
0
0
0
117.
INTCTRL
OUTTGL
IN
112

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