ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 284

• Manufacturer Part Number: ATxmega16D4
• Manufacturer: Atmel Corporation

Specifications of ATxmega16D4

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Speed: No
• Usb Interface: No
• Spi: 4
• Twi (i2c): 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 14
• Input Capture Channels: 14
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 23-3.
23.10.3.1
23.10.3.2
23.10.4
23.10.4.1
8210B–AVR–04/10
CMD[6:0]
0x00
Fuses and Lock Bits
0x07
0x08
EEPROM Programming
Group Configuration
NO_OPERATION
READ_FUSES
WRITE_LOCK_BITS
Write Lock Bits Write
Read Fuses
Addressing the EEPROM
Fuse and Lock Bit Commands
Section 23.10.3.1 on page 284
algorithm for each NVM operation.
The Write Lock Bits command is used to program the Boot Lock Bits to a more secure settings
from software.
1.
2.
3.
during self-programming.
The BUSY flag in the NVM STATUS register will be set until the command is finished. The CPU
is halted during the complete execution of the command.
This command can be executed from both the Boot Loader Section and the Application Section.
The EEPROM and Flash Page Buffer is automatically erased when the Lock Bits are written.
The Read Fuses command is used to read the Fuses from software.
1.
2.
3.
during self-programming.
The result will be available in the NVM DATA0 register. The CPU is halted during the complete
execution of the command.
The EEPROM can be read and written from application code in any part of the Flash. Its is both
byte and page accessible. This means that either one byte or one page can be written to the
EEPROM at once. One byte is read from the EEPROM during read.
The EEPROM can be accessed through the NVM controller (I/O mapped), similar to the Flash
Program memory, or it can be memory mapped into the Data Memory space to be accessed
similar to SRAM.
When accessing the EEPROM through the NVM Controller, the NVM Address (ADDR) register
is used to address the EEPROM, while the NVM Data (DATA) register is used to store or load
EEPROM data.
Load the NVM DATA0 register with the new Lock bit value.
Load the NVM CMD register with the Write Lock Bit command.
Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
Load the NVM ADDR registers with the address to the fuse byte to read.
Load the NVM CMD register with the Read Fuses command.
Set the CMDEX bit in the NVM CTRLA register. This requires the timed CCP sequence
Description
No Operation
Read Fuses
Write Lock Bits
through
Trigger
CMDEX
CMDEX
—
Section 23.10.3.2 on page 284
CPU
Halted
—
N
N
Change
Protected
—
N
Y
Address
pointer
ADDR
ADDR
—
explain in details the
XMEGA D
Data
register
DATA
—
—
NVM
Busy
—
Y
Y
284