ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 121

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ATxmega16D4

Manufacturer Part Number
ATxmega16D4
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega16D4

Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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12. TC - 16-bit Timer/Counter
12.1
12.2
8210B–AVR–04/10
Features
Overview
XMEGA has a set of high-end and very flexible 16-bit Timer/Counters (TC). Their basic capabili-
ties include accurate program execution timing, frequency and waveform generation, event
management, and time measurement of digital signals. The Hi-Resolution Extension (Hi-Res)
and Advanced Waveform Extension (AWeX) can be used together with a Timer/Counter to ease
implementation of more advanced and specialized frequency and waveform generation
features.
A block diagram of the 16-bit Timer/Counter with extensions and closely related peripheral mod-
ules (in grey) is shown in
16-bit Timer/Counter
Double Buffered Timer Period Setting
Up to 4 Combined Compare or Capture (CC) Channels (A, B, C, and D)
All Compare or Capture Channels are Double Buffered
Waveform Generation:
Input Capture:
32-bit input capture Direction Control
Timer Overflow and Timer Error Interrupts / Events
One Compare Match or Capture Interrupt / Event per CC Channel
Hi-Res- Hi-Resolution Extension
AWeX - Advanced Waveform Extension
– Single Slope Pulse Width Modulation
– Dual Slope Pulse Width Modulation
– Frequency Generation
– Input Capture with Noise Cancelling
– Frequency capture
– Pulse width capture
– Increases PWM/FRQ Resolution by 2-bits (4x)
– 4 Dead-Time Insertion (DT) Units with separate high- and low-side settings
– Event controlled fault protection
– Single channel multiple output operation
– Pattern Generation
Figure 12-1 on page
122.
XMEGA D
121

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