AD7147A Analog Devices, AD7147A Datasheet - Page 28

• Manufacturer Part Number: AD7147A
• Manufacturer: Analog Devices

Specifications of AD7147A

• Resolution (bits): 16bit
• # Chan: 13
• Sample Rate: 111SPS
• Interface: I²C/Ser 2-Wire,Ser,SPI
• Analog Input Type: Capacitive
• Ain Range: ± 8 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD7147A
CONVERSIONS
CONVERSIONS
SERIAL
SERIAL
READS
READS
INT
INT
NOTES
THIS IS AN EXAMPLE OF A CDC CONVERSION-COMPLETE INTERRUPT.
THIS TIMING EXAMPLE SHOWS THAT THE INTERRUPT OUTPUT HAS BEEN ENABLED TO BE ASSERTED AT THE END OF A CONVERSION CYCLE FOR
STAGE0, STAGE5, AND STAGE9. THE INTERRUPTS FOR ALL OTHER STAGES HAVE BEEN DISABLED.
STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE0, STAGE5, AND STAGE9 (x = 0, 5, 9):
STAGEx_LOW_INT_ENABLE (ADDRESS 0x005) = 0
STAGEx_HIGH_INT_ENABLE (ADDRESS 0x006) = 0
STAGEx_COMPLETE_INT_ENABLE (ADDRESS 0x007) = 1
STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE1 THROUGH STAGE8, STAGE10, AND STAGE11 (x = 1, 2, 3, 4, 6, 7, 8, 10, 11):
STAGEx_LOW_INT_ENABLE (ADDRESS 0x005) = 0
STAGEx_HIGH_INT_ENABLE (ADDRESS 0x006) = 0
STAGEx_COMPLETE_INT_ENABLE (ADDRESS 0x007) = 0
SERIAL READBACK REQUIREMENTS FOR STAGE0, STAGE5, AND STAGE9 (THIS READBACK OPERATION IS REQUIRED TO CLEAR THE INTERRUPT OUTPUT.):
1
2
3
NOTES
THIS IS AN EXAMPLE OF A SENSOR-TOUCH INTERRUPT FOR A CASE WHERE THE LOW THRESHOLD LEVELS WERE EXCEEDED.
FOR EXAMPLE, THE SENSOR CONNECTED TO STAGE0 AND STAGE9 WERE CONTACTED, AND THE LOW THRESHOLD LEVELS WERE EXCEEDED, RESULTING
IN THE INTERRUPT BEING ASSERTED. THE STAGE6 INTERRUPT WAS NOT ASSERTED BECAUSE THE USER DID NOT CONTACT THE SENSOR CONNECTED TO
STAGE6.
STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE0, STAGE6, AND STAGE9 (x = 0, 6, 9):
STAGEx_LOW_INT_ENABLE (ADDRESS 0x005) = 1
STAGEx_HIGH_INT_ENABLE (ADDRESS 0x006) = 0
STAGEx_COMPLETE_INT_ENABLE (ADDRESS 0x007) = 0
STAGEx CONFIGURATION PROGRAMMING NOTES FOR STAGE1 THROUGH STAGE7, STAGE8, STAGE10, AND STAGE11 (x = 1, 2, 3, 4, 5, 7, 8, 10, 11):
STAGEx_LOW_INT_ENABLE (ADDRESS 0x005) = 0
STAGEx_HIGH_INT_ENABLE (ADDRESS 0x006) = 0
STAGEx_COMPLETE_INT_ENABLE (ADDRESS 0x007) = 0
SERIAL READBACK REQUIREMENTS FOR STAGE0 AND STAGE9 (THIS READBACK OPERATION IS REQUIRED TO CLEAR THE INTERRUPT OUTPUT.):
1
2
READ THE STAGE0_COMPLETE_INT_STATUS (ADDRESS 0x00A) BIT
READ THE STAGE5_COMPLETE_INT_STATUS (ADDRESS 0x00A) BIT
READ THE STAGE9_COMPLETE_INT_STATUS (ADDRESS 0x00A) BIT
READ THE STAGE0_LOW_INT_STATUS (ADDRESS 0x008) BIT
READ THE STAGE5_LOW_INT_STATUS (ADDRESS 0x008) BIT
STAGE0
STAGE0
1
1
STAGE1
STAGE1
Figure 40. Example of Configuring the Registers for Conversion-Complete Interrupt Setup
Figure 41. Example of Configuring the Registers for Sensor-Touch Interrupt Setup
STAGE2
STAGE2
STAGE3
STAGE3
STAGE4
STAGE4
Rev. B | Page 28 of 68
STAGE5
STAGE5
2
4
STAGE6
STAGE6
STAGE7
STAGE7
STAGE8
STAGE8
STAGE9
STAGE9
3
2
STAGE10
STAGE10
STAGE11
STAGE11