AD7147A Analog Devices, AD7147A Datasheet - Page 36

• Manufacturer Part Number: AD7147A
• Manufacturer: Analog Devices

Specifications of AD7147A

• Resolution (bits): 16bit
• # Chan: 13
• Sample Rate: 111SPS
• Interface: I²C/Ser 2-Wire,Ser,SPI
• Analog Input Type: Capacitive
• Ain Range: ± 8 pF (Delta C)
• Adc Architecture: Sigma-Delta
• Pkg Type: CSP

AD7147A
WRITE TRANSACTIONS
V
The supply voltage for the pins (SDO, SDI, SCLK, SDA, CS ,
INT , and GPIO) associated with both the I
interfaces is supplied from the V
main V
WRITE
READ (USING REPEATED START)
SEPARATE READ AND
READ (WRITE TRANSACTION SETS UP REGISTER ADDRESS)
S
S
S
DRIVE
6-BIT DEVICE
6-BIT DEVICE
REPEATED START
6-BIT DEVICE
ADDRESS
ADDRESS
SCLK
ADDRESS
OUTPUT FROM AD7147-1
OUTPUT FROM MASTER
SDA
INPUT
CC
START
NOTES
1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCLK REMAINS HIGH.
3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.
4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB Xs ARE DON'T CARE BITS.
5. 16-BIT REGISTER ADDRESS [A15:A0] = [X, X, X, X, X, X, A9, A8, A7, A6, A5, A4, A3, A2, A1, A0], WHERE THE UPPER LSB Xs ARE DON’T CARE BITS.
6. REGISTER ADDRESS [A15:A8] AND REGISTER ADDRESS [A7:A0] ARE ALWAYS SEPARATED BY LOW ACK BITS.
7. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.
8. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION.
supply.
USING
W
W
W
t
1
REGISTER ADDR
REGISTER ADDR
REGISTER ADDR
DEV
A6
HIGH BYTE
HIGH BYTE
1
[15:8]
AD7147A-1 DEVICE ADDRESS
DEV
A5
SR
2
28
S = START BIT
P = STOP BIT
SR = REPEATED START BIT
P
DEV
A4
DEV
A6
3
DRIVE
29
DEV
28
REGISTER ADDR
REGISTER ADDR
S
A3
t
REGISTER ADDR
AD7147A-1 DEVICE ADDRESS
2
DEV
A5
4
LOW BYTE
LOW BYTE
pin and is separate from the
30
DEV
A6
DEV
[7:0]
A2
29
Figure 53. Example of I
5
AD7147A-1 DEVICE ADDRESS
Figure 54. Example of Sequential I
DEV
2
DEV
A5
A1
C and SPI serial
30
6
t
3
DEV
A0
DEV
7
A1
HIGH BYTE [15:8]
ACK = ACKNOWLEDGE BIT
ACK = NO ACKNOWLEDGE BIT
P
34
WRITE DATA
6-BIT DEVICE
R/W
ADDRESS
DEV
8
A0
t
S
4
35
DEV
ACK
A1
6-BIT DEVICE
ADDRESS
34
R/W
9
2
C Timing for Single Register Readback Operation
36
DEV
A15
A0
t
Rev. B | Page 36 of 68
4
35
ACK
10
REGISTER ADDRESS [A15:A8]
37
R/W
LOW BYTE [7:0]
A14
HIGH BYTE [15:8]
WRITE DATA
36
11
READ DATA
D7
38
ACK
2
C Write and Readback Operations
REGISTER DATA [D7:D0]
HIGH BYTE [15:8]
37
D6
READ DATA
39
t
5
D7
This allows the AD7147A to be connected directly to processors
whose supply voltage is less than the minimum operating voltage
of the AD7147A without the need for external level-shifters.
The V
1.65 V and as high as V
38
REGISTER DATA [D7:D0]
D6
A9
39
t
5
LOW BYTE [7:0]
16
DRIVE
HIGH BYTE [15:8]
READ DATA
WRITE DATA
A8
17
D1
LOW BYTE [7:0]
pin can be connected to voltage supplies as low as
44
READ DATA
ACK
18
D0
45
D1
A7
44
ACK
19
REGISTER ADDRESS [A7:A0]
46
D0
LOW BYTE [7:0]
HIGH BYTE [15:8]
A6
WRITE DATA
45
CC
20
READ DATA
.
ACK
t
6
HIGH BYTE [15:8]
P
46
READ DATA
t
8
P
A1
P
25
t
LOW BYTE [7:0]
7
READ DATA
A0
AD7147A-1 DEVICE ADDRESS
26
LOW BYTE [7:0]
READ DATA
DEV
ACK
A6
27
1
DEV
A5
ACK
2
DEV
A4
P
3
ACK
P