AD5625R Analog Devices, AD5625R Datasheet - Page 30

• Manufacturer Part Number: AD5625R
• Manufacturer: Analog Devices

Specifications of AD5625R

• Resolution (bits): 12bit
• Dac Update Rate: 333kSPS
• Dac Settling Time: 3µs
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: I2C/Ser 2-wire,Ser

AD5625R/AD5645R/AD5665R, AD5625/AD5665
POWER-ON RESET AND SOFTWARE RESET
The AD56x5R/AD56x5 contain a power-on reset circuit that
controls the output voltage during power-up. The 10-lead
version of the device powers up to 0 V. The 14-lead version has
a power-on reset (POR) pin that allows the output voltage to
be selected. By connecting the POR pin to GND, the AD56x5R/
AD56x5 output powers up to 0 V; by connecting the POR pin to
V
output remains powered up at this level until a valid write sequence
is made to the DAC. This is useful in applications where it is
important to know the state of the output of the DAC while it is
in the process of powering up.
Any events on LDAC or CLR during power-on reset are ignored.
There is also a software reset function. Command 101 is the
software reset command. The software reset command contains
two reset modes that are software programmable by setting bit
DB0 in the input shift register.
Table 15 shows how the state of the bit corresponds to the
software reset modes of operation of the devices. Figure 70
shows the contents of the input shift register during the
software reset mode of operation.
DD
, the AD56x5R/AD56x5 output powers up to midscale. The
X
R
0
0
S
X
S
X
C2
C2
1
1
COMMAND
COMMAND
C1
C1
0
1
C0
C0
1
1
A2
A2
X
X
DAC ADDRESS
DAC ADDRESS
(DON’T CARE)
(DON’T CARE)
A1
A1
X
X
A0
A0
X
X
DB15 DB14 DB13 DB12 DB11 DB10
DB15 DB14 DB13 DB12 DB11 DB10
X
X
Figure 71. Reference Setup Command
X
X
Figure 70. Reset Command
X
X
Rev. B | Page 30 of 36
DON’T CARE
DON’T CARE
X
X
X
X
Table 15. Software Reset Modes for the AD56x5R/AD56x5
DB0
0
1 (Power-On Reset)
INTERNAL REFERENCE SETUP (R VERSIONS)
The on-chip reference is off at power-up by default. It can be
turned on by sending the reference setup command (111) and
setting DB0 in the input shift register. Table 16 shows how the
state of the bit corresponds to the mode of operation.
Table 16. Reference Setup Command
DB0
0
1
X
X
DB9
DB9
X
X
DB8
DB8
X
X
Action
Internal reference off (default)
Internal reference on
DB7
DB7
X
X
DB6
DB6
X
X
Registers Reset to Zero
DAC register
Input shift register
DAC register
Input shift register
LDAC register
Power-down register
Internal reference setup register
DB5
DB5
X
X
DON’T CARE
DON’T CARE
DB4
DB4
X
X
DB3
DB3
X
X
DB2
DB2
X
X
DB1
DB1
X
X
DB0
RST
DB0
REF