ADP5022 Analog Devices, ADP5022 Datasheet - Page 22

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ADP5022

Manufacturer Part Number
ADP5022
Description
Dual 3 MHz, 600 mA Buck Regulator with 150 mA LDO
Manufacturer
Analog Devices
Datasheet
ADP5022
PCB LAYOUT GUIDELINES
Poor layout can affect ADP5022 performance, causing electro-
magnetic interference (EMI) and electromagnetic compatibility
(EMC) problems, ground bounce, and voltage losses. Poor
layout can also affect regulation and stability. A good layout is
implemented using the following guidelines:
Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies, and large tracks act as antennas.
Rev. C | Page 22 of 28
Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
Maximize the size of ground metal on the component side
to help with thermal dissipation.
Use a ground plane with several vias connecting to
the component side ground to further reduce noise
interference on sensitive circuit nodes.

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