ADP5040 Analog Devices, ADP5040 Datasheet - Page 31

• Manufacturer Part Number: ADP5040
• Description: Micro PMU with 1.2 A Buck Regulator and Two 300 mA LDOs
• Manufacturer: Analog Devices

Data Sheet
Table 12. Suggested 1.0 μF Capacitors
Vendor
Murata
TDK
Panasonic
Taiyo Yuden
Input and Output Capacitor Properties
Use any good quality ceramic capacitor with the
long as it meets the minimum capacitance and maximum ESR
requirements. Ceramic capacitors are manufactured with a variety
of dielectrics, each with a different behavior over temperature
and applied voltage. Capacitors must have a dielectric adequate
to ensure the minimum capacitance over the necessary tempe-
rature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended for best
performance. Y5V and Z5U dielectrics are not recommended
for use with any LDO because of their poor temperature and dc
bias characteristics.
Figure 107 depicts the capacitance vs. voltage bias characteristic
of a 0402 1 µF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the
X5R dielectric is about ±15% over the −40°C to +85°C tempera-
ture range and is not a function of package or voltage rating.
Use the following equation to determine the worst-case capa-
citance accounting for capacitor variation over temperature,
component tolerance, and voltage.
where:
C
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient
(TEMPCO) over −40°C to +85°C is assumed to be 15% for an
BIAS
C
is the effective capacitance at the operating voltage.
EFF
1.2
1.0
0.8
0.6
0.4
0.2
0
0
= C
Figure 107. Capacitance vs. Voltage Characteristic
BIAS
Type
X5R
X5R
X5R
X5R
× (1 − TEMPCO) × (1 − TOL)
1
Model
GRM155R61A105ME15
C1005JB0J105KT
ECJ0EB0J105K
LMK105BJ105MV-F
DC BIAS VOLTAGE (V)
2
3
4
Case
Size
0402
0402
0402
0402
ADP5040
5
Voltage
Rating
(V)
10.0
6.3
6.3
10.0
6
as
Rev. 0 | Page 31 of 40
X5R dielectric. The tolerance of the capacitor (TOL) is assumed
to be 10%, and C
Substituting these values into the following equation yields:
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
To guarantee the performance of the ADP5040, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
POWER DISSIPATION/THERMAL CONSIDERATIONS
The
unit (micro PMU), and in most cases the power dissipated in
the device is not a concern. However, if the device operates at
high ambient temperatures and with maximum loading
conditions, the junction temperature can reach the maximum
allowable operating limit (125°C).
When the junction temperature exceeds 150°C, the
turns off all the regulators, allowing the device to cool down.
Once the die temperature falls below 135°C, the
resumes normal operation.
This section provides guidelines to calculate the power dissi-
pated in the device and to make sure the
below the maximum allowable junction temperature.
The efficiency for each regulator on the
where:
η is efficiency.
P
P
Power loss is given by
Power dissipation can be calculated in several ways. The most
intuitive and practical way is to measure the power dissipated at
the input and all the outputs. The measurements should be
performed at the worst-case conditions (voltages, currents,
and temperature). The difference between input and output
power is dissipated in the device and the inductor. Use
Equation 4 to derive the power lost in the inductor, and from
this use Equation 3 to calculate the power dissipation in the
ADP5040
A second method to estimate the power dissipation uses the
efficiency curves provided for the buck regulator, whereas the
power lost on a LDO is calculated using Equation 12. When the
buck efficiency is known, use Equation 2b to derive the total
power lost in the buck regulator and inductor. Use Equation 4
IN
OUT
is the input power.
ADP5040
C
P
or
P
is the output power.
η
LOSS
LOSS
EFF
=
= 0.94 μF × (1 – 0.15) × (1 – 0.1) = 0.72 μF
P
= P
= P
P
buck regulator.
OUT
IN
IN
OUT
is a highly efficient micropower management
×
− P
100%
× (1 − η)/η
BIAS
OUT
is 0.94 μF at 1.8 V as shown in Figure 107.
ADP5040
ADP5040
ADP5040
ADP5040
is given by
operates
ADP5040
(2b)
(2a)
(1)