LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 34

• Manufacturer Part Number: LPC2926_27_29
• Description: The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2926_27_29
Product data sheet
6.13.5.1 Functional description
6.13.5.2 Pin description
The SPI module can operate in:
The SPI module is a master or slave interface for synchronous serial communication with
peripheral devices that have either Motorola SPI or Texas Instruments Synchronous
Serial Interfaces.
The SPI module performs serial-to-parallel conversion on data received from a peripheral
device. The transmit and receive paths are buffered with FIFO memories (16 bits wide ×
32 words deep). Serial data is transmitted on pins SDOx and received on pins SDIx.
The SPI module includes a programmable bit-rate clock divider and prescaler to generate
the SPI serial clock from the input clock CLK_SPIx.
The SPI module’s operating mode, frame format, and word size are programmed through
the SLVn_SETTINGS registers.
A single combined interrupt request SPI_INTREQ output is asserted if any of the
interrupts are asserted and unmasked.
Depending on the operating mode selected, the SPI SCS outputs operate as an
active-HIGH frame synchronization output for Texas Instruments synchronous serial
frame format or an active-LOW chip select for SPI.
Each data frame is between four and 16 bits long, depending on the size of words
programmed, and is transmitted starting with the MSB.
The SPI pins are combined with other functions on the port pins of the
LPC2926/2927/2929, see
y runs from 0 to 3).
Table 18.
Symbol
SPIx SCSy
•
•
•
•
•
•
•
•
Programmable choice of interface operation: Motorola SPI or Texas Instruments
Synchronous Serial Interfaces.
Programmable data-frame size from 4 to 16 bits.
Independent masking of transmit FIFO, receive FIFO and receive overrun interrupts.
Serial clock-rate master mode: fserial_clk ≤ f
Serial clock-rate slave mode: fserial_clk = f
Internal loopback test mode.
Master mode:
– Normal transmission mode
– Sequential slave mode
Slave mode
SPI pins
SCSy
Pin name
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 September 2010
Section
IN/OUT
Direction
6.12.3.
ARM9 microcontroller with CAN, LIN, and USB
Description
SPIx chip select
Table 18
clk(SPI)
LPC2926/2927/2929
clk(SPI)
shows the SPI pins (x runs from 0 to 2;
/4.
/2.
[1][2]
© NXP B.V. 2010. All rights reserved.
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