P89LPC9331_9341_9351_9361 NXP Semiconductors, P89LPC9331_9341_9351_9361 Datasheet - Page 78

• Manufacturer Part Number: P89LPC9331_9341_9351_9361
• Description: The P89LPC9331/9341/9351/9361 is a single-chip microcontroller, available in low costpackages, based on a high performance processor architecture that executes instructionsin two to four clocks, six times the rate of standard 80C51 devices
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 15.
V
T
P89LPC9331_9341_9351_9361
Product data sheet
Symbol Parameter
f
f
f
T
f
Glitch filter
t
t
External clock
t
t
t
t
Shift register (UART mode 0)
T
t
t
t
t
SPI interface
f
T
osc(RC)
osc(WD)
osc
CLKLP
gr
sa
CHCX
CLCX
CLCH
CHCL
QVXH
XHQX
XHDX
XHDV
SPI
amb
DD
cy(clk)
XLXL
SPICYC
= 3.0 V to 3.6 V unless otherwise specified.
=
−
40
internal RC oscillator
frequency
internal watchdog
oscillator frequency
oscillator frequency
clock cycle time
low-power select clock
frequency
glitch rejection time
signal acceptance time
clock HIGH time
clock LOW time
clock rise time
clock fall time
serial port clock cycle
time
output data set-up to
clock rising edge time
output data hold after
clock rising edge time
input data hold after
clock rising edge time
input data valid to clock
rising edge time
SPI operating frequency
SPI cycle time
°
Dynamic characteristics (18 MHz)
C to +85
slave
master
slave
master
°
C for industrial applications,
P1.5/RST pin
P1.5/RST pin
see
Conditions
nominal f = 7.3728 MHz
trimmed to ± 1 % at
T
doubler option = OFF
(default)
nominal f = 14.7456 MHz;
clock doubler option = ON
T
see
any pin except P1.5/RST
any pin except P1.5/RST
see
see
see
see
see
see
see
see
see
amb
amb
Figure 41
Figure 41
Figure 41
Figure 41
Figure 41
Figure 42
Figure 42
Figure 42
Figure 42
Figure 42
Figure
All information provided in this document is subject to legal disclaimers.
= 25 °C; clock
= 25 °C
43, 44, 45,
Rev. 5 — 10 January 2011
−
40
8-bit microcontroller with accelerated two-clock 80C51 core
°
C to +125
P89LPC9331/9341/9351/9361
46
°
C extended, unless otherwise specified.
16T
13T
14.378
7.189
6
4
Min
⁄
⁄
380
125
150
CCLK
CCLK
55
50
22
22
0
0
0
cy(clk)
cy(clk)
-
-
-
-
-
-
-
Variable clock
T
T
cy(clk)
T
cy(clk)
cy(clk)
15.114
CCLK
CCLK
7.557
Max
420
18
50
15
8
5
5
0
-
-
-
-
-
-
-
-
− t
− t
+ 20
⁄
⁄
6
4
CHCX
CLCX
14.378 15.114 MHz
f
7.189
osc
Min
380
125
888
722
150
333
222
50
22
22
© NXP B.V. 2011. All rights reserved.
0
-
-
-
-
-
-
-
-
-
-
= 18 MHz
[1][2]
7.557 MHz
Max
420
3.0
4.5
50
15
75
5
5
0
-
-
-
-
-
-
-
-
-
-
-
-
78 of 94
Unit
kHz
MHz
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
ns
ns