PSMN9R5-30YLC NXP Semiconductors, PSMN9R5-30YLC Datasheet - Page 3

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN9R5-30YLC

Manufacturer Part Number
PSMN9R5-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
4. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134).
PSMN9R5-30YLC
Product data sheet
Symbol
V
V
V
I
I
P
T
T
T
V
Source-drain diode
I
I
Avalanche ruggedness
E
D
DM
S
SM
Fig 1.
stg
j
sld(M)
DS
DGR
GS
tot
ESD
DS(AL)S
(A)
I
D
50
40
30
20
10
0
mounting base temperature
Continuous drain current as a function of
0
Limiting values
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
peak drain current
total power dissipation
storage temperature
junction temperature
peak soldering temperature
electrostatic discharge voltage
source current
peak source current
non-repetitive drain-source
avalanche energy
50
N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK using NextPower technology
100
150
All information provided in this document is subject to legal disclaimers.
T
003aag180
mb
( ° C)
Rev. 2 — 1 September 2011
200
Conditions
25 °C ≤ T
25 °C ≤ T
V
V
pulsed; t
see
T
MM (JEDEC JESD22-A115)
T
pulsed; t
V
V
see
mb
mb
GS
GS
GS
sup
Figure 4
Figure 3
= 25 °C; see
= 25 °C
= 10 V; T
= 10 V; T
= 10 V; T
≤ 30 V; R
p
p
j
j
≤ 10 µs; T
≤ 10 µs; T
≤ 175 °C
≤ 175 °C; R
Fig 2.
mb
mb
j(init)
GS
P
(%)
der
120
= 25 °C; see
= 100 °C; see
80
40
= 50 Ω; unclamped;
Figure 2
= 25 °C; I
0
function of mounting base temperature
Normalized total power dissipation as a
0
mb
mb
GS
= 25 °C;
= 25 °C
= 20 kΩ
D
50
= 44 A;
Figure 1
PSMN9R5-30YLC
Figure 1
100
Min
-
-
-20
-
-
-
-
-55
-55
-
150
-
-
-
150
© NXP B.V. 2011. All rights reserved.
T
mb
175
175
-
Max
30
30
20
44
31
177
34
260
31
177
9
03na19
(°C)
200
Unit
V
V
V
A
A
A
W
°C
°C
°C
V
A
A
mJ
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