PSMN9R5-30YLC NXP Semiconductors, PSMN9R5-30YLC Datasheet - Page 9

Logic level enhancement mode N-channel MOSFET in LFPAK package

PSMN9R5-30YLC

Manufacturer Part Number
PSMN9R5-30YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN9R5-30YLC
Product data sheet
Fig 12. Drain-source on-state resistance as a function
Fig 14. Gate charge waveform definitions
R
(mΩ)
DSon
40
30
20
10
0
of drain current; typical values
0
V
V
V
V
GS(pl)
DS
GS(th)
GS
10
2.8
Q
GS1
I
Q
D
GS
20
N-channel 30 V 9.8 mΩ logic level MOSFET in LFPAK using NextPower technology
Q
GS2
3.0
Q
G(tot)
30
Q
GD
V
GS
40
All information provided in this document is subject to legal disclaimers.
003aag190
003aaa508
(V) = 3.5
I
D
(A)
4.5
10
Rev. 2 — 1 September 2011
50
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
(V)
a
GS
1.5
0.5
10
2
1
0
8
6
4
2
0
-60
factor as a function of junction temperature
charge; typical values
0
0
PSMN9R5-30YLC
4
60
V
DS
4.5V
= 6V
8
15V
120
24V
V
Q
© NXP B.V. 2011. All rights reserved.
GS
003aag191
003aag192
G
T
=10V
j
(nC)
(DC)
180
12
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