ST92124V1Q-Auto STMicroelectronics, ST92124V1Q-Auto Datasheet - Page 337

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ST92124V1Q-Auto

Manufacturer Part Number
ST92124V1Q-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST92124V1Q-Auto

Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
CONTROLLER AREA NETWORK (Cont’d)
10.10.5.5 Message Storage
The interface between the software and the hard-
ware for the CAN messages is implemented by
means of mailboxes. A mailbox contains all infor-
mation related to a message; identifier, data, con-
trol, status and time stamp information.
Transmit Mailbox
The software sets up the message to be transmit-
ted in an empty transmit mailbox. The status of the
transmission is indicated by hardware in the
MCSR register.
Offset to Transmit
Mailbox base ad-
dress (bytes)
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Transmit Mailbox Mapping
Register Name
MCSR
MDLC
MIDR0
MIDR1
MIDR2
MIDR3
MDAR0
MDAR1
MDAR2
MDAR3
MDAR4
MDAR5
MDAR6
MDAR7
MTSR0
MTSR1
ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
Receive Mailbox
When a message has been received, it is available
to the software in the FIFO output mailbox. Once
the software has handled the message (e.g. read
it) the software must release the FIFO output mail-
box by means of the RFOM bit in the CRFR regis-
ter to make the next incoming message available.
The filter match index is stored in the MFMI regis-
ter. The 16-bit time stamp value is stored in the
MTSR[0:1] registers.
Offset to Receive
Mailbox base ad-
dress (bytes)
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
Receive Mailbox Mapping
Register Name
MFMI
MDLC
MIDR0
MIDR1
MIDR2
MIDR3
MDAR0
MDAR1
MDAR2
MDAR3
MDAR4
MDAR5
MDAR6
MDAR7
MTSR0
MTSR1
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