BTS 6480SF Infineon Technologies, BTS 6480SF Datasheet - Page 14

• Manufacturer Part Number: BTS 6480SF
• Manufacturer: Infineon Technologies

Specifications of BTS 6480SF

• Packages: PG-DSO-36
• Channels: 4.0
• Channel Mix: 2*4,5mohm+2*11mohm
• Led Mode: Yes
• Cranking Mode: No
• Pwm Engine Integrated: Yes

Activating one of the outputs via the input pins (INx = high) will wake-up the device out of stand-by mode. The
power stages are working without VDD supply according to the table above. The output turn-on times will be
extended by the stand-by channel wake up time
active already before channel turn-on times
Note: In the operation with
Limp home (LHI = high) applied for a time longer than
the power-on wake up time
the input pins INx. The error latches can be cleared by a low-high transition at the according input pin.
5.2
There are several reset trigger implemented in the device. They reset the SPI registers including the over
temperature latches to their default values. The power stages will switch off, if they are activated via the SPI
register OUT.n. If the power stages are activated via the parallel input pins they are not affected by the reset
signals. The ERR-flags are cleared by those reset triggers. The over temperature protection and latches are
functional after a reset trigger.
Note: During a reset only the channels 1, 2 and 3 can be activated via the according input pins. The input assigned
The first SPI transmission after any kind of reset contains at pin SO the read information from the standard
diagnosis, the transmission error bit TER is set.
Power-On Reset
The power-on reset is released, when
after wake up time
Reset Command
There is a reset command available to reset all register bits of the register bank and the diagnosis registers. As
soon as HWCR.RST = 1
after transfer delay time
Limp Home Mode
The limp home mode will be activated as soon as the pin LHI is set to high for a time longer than
write-registers are reset with applied
activated limp home mode. The error latches can be cleared by a low-high transition at the according input pin.
For application example see
as well as the error flags can be read, but any write command will be ignored.
Data Sheet
by mode. In stand-by mode the error latches are cleared.
mode is not available during a reset.
Reset
t
WU(PO)
t
CS(td)
b
.
, a reset is triggered equivalent to power-on reset. The SPI interface can be accessed
V
t
DD
WU(PO)
Figure
.
= 0 V and INx = high a switching off of all input signals will turn the device in stand-
and it is working without VDD supply. Channels 1, 2 and 3 can be activated via
V
30. The SPI interface is operating normally, so the limp home register bit LHI
BB
V
DD
voltage. The outputs OUTx can be activated via the input pins also during
voltage level is higher than
t
on
(6.6.12) can be considered.
t
WU(STCH)
14
t
LH(ac)
as long as no other channel is active. If one channel is
will wake-up the device out of stand-by mode after
V
DD(PO)
. The SPI interface can be accessed
SPOC - BTS6480SF
Rev. 1.0, 2010-04-12
Power Supply
t
LH(ac)
. The SPI