74ALVT162827DGG,11 NXP Semiconductors, 74ALVT162827DGG,11 Datasheet - Page 2

IC BUFF DVR TRI-ST 20BIT 56TSSOP

74ALVT162827DGG,11

Manufacturer Part Number
74ALVT162827DGG,11
Description
IC BUFF DVR TRI-ST 20BIT 56TSSOP
Manufacturer
NXP Semiconductors
Series
74ALVTr
Datasheet

Specifications of 74ALVT162827DGG,11

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
2
Number Of Bits Per Element
10
Current - Output High, Low
8mA, 12mA
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-TSSOP
Logic Family
ALVT
Number Of Channels Per Chip
20
Polarity
Non-Inverting
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
20 / 20
Output Type
3-State
Propagation Delay Time
2.7 ns at 2.5 V, 2.2 ns at 3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74ALVT162827DG
74ALVT162827DG
935210070112
Philips Semiconductors
FEATURES
QUICK REFERENCE DATA
ORDERING INFORMATION
PIN DESCRIPTION
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
1998 Feb 13
Multiple V
5V I/O Compatible
Live insertion/extraction permitted
3-State output buffers
Outputs include series resistance of 30 making external
termination resistors unnecessary
Power-up 3-State
Output capability: +12mA/–12mA
Latch-up protection exceeds 500mA per Jedec Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
2.5V/3.3V 20-bit buffer/line driver, non-inverting,
with 30 termination resistors (3-State)
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
SYMBOL
SYMBOL
C
I
t
t
C
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
PLH
PHL
CCZ
4, 11, 18, 25, 32, 39, 46, 53
Out
IN
CC
PACKAGES
and GND pins minimize switching noise
PIN NUMBER
7, 22, 35, 50
28, 29
1, 56,
Propagation delay
nAx to nBx or nBx to nAx
Input capacitance DIR, OE
Output capacitance
Total supply current
PARAMETER
PARAMETER
TEMPERATURE RANGE
–40 C to +85 C
–40 C to +85 C
1OE0, 1OE1
2OE0, 2OE1
1A0 - 1A9
2A0 - 2A9
1Y0 - 1Y9
2Y0 - 2Y9
SYMBOL
GND
V
CC
C
V
V
Outputs disabled
I
I/O
L
= 0V or V
OUTSIDE NORTH AMERICA
= 50pF
= 0V or V
2
74ALVT162827 DGG
74ALVT162827 DL
DESCRIPTION
The 74ALVT162827 high-performance BiCMOS device combines
low static and dynamic power dissipation with high speed and high
output drive. It is designed for V
compatibility to 5V.
The 74ALVT162827 20-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NOR Output Enables (nOE1, nOE2) for maximum
control flexibility.
The 74ALVT162827 is designed with 30 series resistance in both
the pull-up and pull-down output structures. This design reduces line
noise in applications such as memory address drivers, clock drivers
and bus receivers/transmitters.
CC
CONDITIONS
CC
T
amb
= 25 C
Data inputs
Data outputs
Output enable inputs (active-Low)
Ground (0V)
Positive supply voltage
NORTH AMERICA
AV162827 DGG
AV162827 DL
FUNCTION
CC
operation at 2.5V or 3.3V with I/O
2.5V
2.7
2.3
40
3
9
74ALVT162827
TYPICAL
Product specification
3.3V
2.2
2.0
70
3
9
DWG NUMBER
853-1843 18961
SOT371-1
SOT364-1
UNIT
UNIT
pF
pF
ns
A

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