A43E16161V AMIC Technology, Corp., A43E16161V Datasheet - Page 31

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A43E16161V

Manufacturer Part Number
A43E16161V
Description
1M x 16-Bit x 2 Banks Low Power Synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
CLOCK
PRELIMINARY
Read & Write Cycle with Auto Precharge II @Burst Length=4
A10/AP
ADDR
RAS
CAS
(CL=2)
(CL=3)
CKE
DQM
CS
DQ
DQ
WE
BA
0
Row Active
* Note :
(A-Bank)
Ra
Ra
1
- Any command can not be issued at A Bank during t
(August, 2005, Version 0.0)
- if read(Write) command without auto precharge is issued at B-Bank before A Bank auto precharge starts, A Bank auto
When Read(Write) command with auto precharge is issued at A-Bank after A and B Bank activation.
2
precharge will start at B Bank read command input point.
3
Row Active
(B-Bank)
Rb
Rb
4
Read with
Auto Pre
(A-Bank)
Charge
Ca
5
Auto Precharge
Auto Precharge
(A-Bank)
6
Read without
Strart Point
(B-Bank)
Qa0
Cb
7
*Note 1
Qa1
Qa0
8
Qb0
Qa1
9
High
30
Qb1
Qb0
RP
10
after A Bank auto precharge starts.
Qb2
Qb1
11
Precharge
(B-Bank)
Qb3
Qb2
12
Qb3
13
14
Row Active
AMIC Technology, Corp.
(A-Bank)
Ra
Ra
15
16
17
A43E16161
: Don't care
Auto Precharge
18
Write with
(A-Bank)
Da0
Da0
Ca
19
Da1
Da1

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