CS61582-IQ5R Cirrus Logic, Inc., CS61582-IQ5R Datasheet - Page 24

• Manufacturer Part Number: CS61582-IQ5R
• Description: Transmission/Switching, Dual T1/E1 Line Interface, Tape And Reel
• Manufacturer: Cirrus Logic, Inc.

RLOOP1, RLOOP2 : Remote Loopback (Pins 63, 27)
TAOS1, TAOS2 : Transmit All Ones Select (Pins 60, 59)
Status
DPM1, DPM2 : Driver Performance Monitor Alarm (Pins 64, 49)
MTIP1, MTIP2 : Monitor Tip (Pins 16, 33)
MRING1, MRING2 : Monitor Ring (Pins 15, 34)
LOS1, LOS2 : Loss of Signal (Pins 7, 42)
Test
J-TCK : JTAG Test Clock (Pin 40)
J-TMS : JTAG Test Mode Select (Pin 39)
J-TDI : JTAG Test Data In (Pin 10)
J-TDO : JTAG Test Data Out (Pin 8)
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A remote loopback is selected when RLOOP is high. The data received from the line interface
at RTIP and RRING is looped back through the jitter attenuator and retransmitted on TTIP and
TRING. Data recovered from RTIP and RRING continues to be transmitted on RPOS and
RNEG. Data input on TPOS and TNEG is ignored. A TAOS request overrides the data
transmitted at TTIP and TRING.
Setting TAOS high causes continuous ones to be transmitted at the line interface on TTIP and
TRING at the frequency determined by REFCLK.
The DPM alarm indication goes high when differential inputs MTIP and MRING are inactive
for 512
detect a minimum 12.5% ones density signal over 175
consecutive zeros.
The MTIP and MRING inputs may be connected to TTIP and TRING, to detect an inactive
transmit driver. The MTIP and MRING inputs are differential and may be connected to either
transmitter output. To increase the reliability of the performance monitor, it is suggested that the
monitor inputs of one channel be connected the transmitter output pins of another channel or
device.
The LOS indication goes high when 175
interface. The LOS indication returns low when a minimum 12.5% ones density signal over
175
Data on pins J-TDI and J-TDO is valid on the rising edge of J-TCK. When J-TCK is stopped
low, all JTAG registers remain unchanged.
An active high signal on J-TMS enables the JTAG serial port. This pin has an internal pull-up
resistor.
JTAG data is shifted into the device on this pin. This pin has an internal pull-up resistor. Data
must be stable on the rising edge of J-TCK.
JTAG data is shifted out of the device on this pin. This pin is active only when JTAG testing is
in progress. J-TDO will be updated on the falling edge of J-TCK.
75 bit periods with no more than 100 consecutive zeros is received.
2 REFCLK periods. The DPM alarm indication returns low when MTIP and MRING
15 consecutive zeros are received on the line
75 bit periods with no more than 100
DS224PP1