MPC8321E Freescale Semiconductor, Inc, MPC8321E Datasheet - Page 15

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MPC8321E

Manufacturer Part Number
MPC8321E
Description
Mpc8321e Powerquicc Ii Pro Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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6.2
This section provides the AC electrical characteristics for the DDR1 and DDR2 SDRAM interface.
6.2.1
Table 16
Table 17
Table 18
6.2.2
Table 19
Freescale Semiconductor
At recommended operating conditions with Dn_GV
At recommended operating conditions with Dn_GV
At recommended operating conditions with Dn_GV
At recommended operating conditions with Dn_GV
AC input low voltage
AC input high voltage
AC input low voltage
AC input high voltage
Controller skew for MDQS—MDQ/MDM
Notes:
1. t
2. The amount of skew that can be tolerated from MDQS to a corresponding MDQ signal is called t
MCK cycle time, (MCK/MCK crossing)
will be captured with MDQS[n]. This should be subtracted from the total timing budget.
determined by the following equation: t
absolute value of t
MPC8323E PowerQUICC™ II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
CISKEW
provides the input AC timing specifications for the DDR2 SDRAM (Dn_GV
provides the input AC timing specifications for the DDR1 SDRAM (Dn_GV
provides the input AC timing specifications for the DDR1 and DDR2 SDRAM interface.
provides the output AC timing specifications for the DDR1 and DDR2 SDRAM interfaces.
represents the total amount of skew consumed by the controller between MDQS[n] and any corresponding bit that
DDR1 and DDR2 SDRAM AC Electrical Characteristics
DDR1 and DDR2 SDRAM Input AC Timing Specifications
DDR1 and DDR2 SDRAM Output AC Timing Specifications
Parameter
Parameter
Table 16. DDR2 SDRAM Input AC Timing Specifications for 1.8-V Interface
Table 17. DDR1 SDRAM Input AC Timing Specifications for 2.5 V Interface
Parameter
Parameter
CISKEW
Table 19. DDR1 and DDR2 SDRAM Output AC Timing Specifications
Table 18. DDR1 and DDR2 SDRAM Input AC Timing Specifications
.
266 MHz
200 MHz
DISKEW
Symbol
DD
DD
DD
DD
Symbol
V
V
of 1.8 ± 5%.
of 2.5 ± 5%.
of (1.8 or 2.5 V) ± 5%.
of (1.8 or 2.5 V) ± 5%.
IH
IL
V
V
=
IH
IL
±
(T/4 – abs(t
Symbol
Symbol
t
t
MCK
CISKEW
MVREFn
MVREFn
1
CISKEW
Min
REF
Min
REF
)) where T is the clock period and abs(t
+ 0.31
+ 0.25
Min
3
–1250
–750
Min
MVREFn
MVREFn
Max
Max
REF
REF
Max
1250
Max
10
750
– 0.31
– 0.25
DISKEW
DDR1 and DDR2 SDRAM
DD
DD
. This can be
Unit
(typ) = 1.8 V).
(typ) = 2.5 V).
Unit
Unit
Unit
V
V
ps
ns
V
V
CISKEW
) is the
Notes
Notes
Notes
Notes
1, 2
2
15

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