AD9882 Analog Devices, AD9882 Datasheet - Page 19

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AD9882

Manufacturer Part Number
AD9882
Description
Dual Interface for Flat Panel Displays
Manufacturer
Analog Devices
Datasheet

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54
Pin Type
Digital Video
Data Inputs
Digital Video
Clock Inputs
Termination
Control
Outputs
HDCP
Power Supply
DIGITAL INTERFACE PIN DESCRIPTIONS
DIGITAL DATA INPUTS
R
R
R
R
R
R
These six pins receive three pairs of differential, low voltage swing input pixel
data from a DVI transmitter.
DIGITAL CLOCK INPUTS
R
R
These two pins receive the differential, low voltage swing input pixel clock from
a DVI transmitter.
TERMINATION CONTROL
R
REV. A
X0+
X0–
X1+
X1–
X2+
X2–
XC+
XC–
TERM
Positive Differential Input Data (Channel 0)
Negative Differential Input Data (Channel 0)
Positive Differential Input Data (Channel 1)
Negative Differential Input Data (Channel 1)
Positive Differential Input Data (Channel 2)
Negative Differential Input Data (Channel 2)
Positive Differential Input Clock
Negative Differential Input Clock
Internal Termination Set Pin
This pin is used to set the termination resistance
for all of the digital interface high speed inputs.
To set, place a resistor of value equal to 10¥ the
desired input termination resistance between this
pin (Pin 28) and ground supply. Typically, the
value of this resistor should be 500 W.
R
R
R
R
R
R
R
R
R
DE
HSOUT
VSOUT
CTL0, CTL1,
CTL2, CTL3
DDCSCL
DDCSDA
MCL
MDA
PV
V
GND
Mnemonic
V
X0+
X0–
X1+
X1–
X2+
X2–
XC+
XC–
TERM
D
DD
D
Function
Digital Input Channel 0 True
Digital Input Channel 0 Complement
Digital Input Channel 1 True
Digital Input Channel 1 Complement
Digital Input Channel 2 True
Digital Input Channel 2 Complement
Digital Data Clock True
Digital Data Clock Complement
Control Pin for Setting the Internal Termination
Resistance
Data Enable
Hsync Output
Vsync Output
Decoded Control Bit Outputs
HDCP Slave Serial Port Data Clock
HDCP Slave Serial Port Data I/O
HDCP Master Serial Port Data Clock
HDCP Master Serial Port Data I/O
Main Power Supply
PLL Power Supply
Output Power Supply
Ground Supply
Table VIII. Digital Interface Pin List
–19–
OUTPUTS
DE
DDCSCL
DDCSDA
MCL
MDA
CTL
Data Enable Output
This pin outputs the state of data enable (DE).
The AD9882 decodes DE from the incoming
stream of data. The DE signal will be HIGH
during active video and will be LOW while there
is no active video.
HDCP Slave Serial Port Data Clock
For use in communicating with the HDCP
enabled DVI transmitter.
HDCP Slave Serial Port I/O
For use in communicating with the HDCP
enabled DVI transmitter.
HDCP Master Serial Port Data Clock
Connects to the EEPROM for reading the
encrypted HDCP keys.
HDCP Master Serial Port Data I/O
Connects to the EEPROM for reading the
encrypted HDCP keys.
Digital Control Outputs
These pins output the control signals for the
Red and Green channels. CTL0 and CTL1
correspond to the Red channel’s input, while
CTL2 and CTL3 correspond to the Green
channel’s input.
Value
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.15 V to 3.45 V
3.15 V to 3.45 V
2.2 V to 3.6 V
0 V
AD9882
Pin Number
33
32
36
35
39
38
41
42
28
86
88
87
22–25
53
54
81
82

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