AD9882 Analog Devices, AD9882 Datasheet - Page 30

• Manufacturer Part Number: AD9882
• Description: Dual Interface for Flat Panel Displays
• Manufacturer: Analog Devices

AD9882
15
This bit is used to indicate which interface should be active, analog
or digital. It checks for activity on the analog interface and for
activity on the digital interface, then determines which should be
active according to Table XLI. Specifically, analog interface detec-
tion is determined by OR-ing Bits 7, 6, and 5 in this register. Digital
interface detection is determined by Bit 4 in this register. If both
interfaces are detected, the user can determine which has priority
via Bit 1 in Register 0FH. The user can override this function
via Bit 2 in Register 0FH. If the override bit is set to logic 1, then
this bit will be forced to the same state as Bit 1 in Register 0FH.
Bits 7, 6, or 5
(Analog
Detection)
0
0
1
1
X
AI = 0 means analog interface
AI = 1 means digital interface
The override bit is in Register 0FH, Bit 2.
16
This bit indicates which Hsync input source is being used by the
PLL (Hsync input or Sync-on-Green). Bits 6 and 7 in Register
15H determine which source is used. If both Hsync and SOG
are detected, the user can determine which has priority via Bit 3
in Register 10H. The user can override this function via Bit 4
in Register 10H. If the override bit is set to logic 1, then this
bit will be forced to the same state as Bit 3 in Register 10H.
Hsync Detect SOG Detect
Register 15H
Bit 7
0
0
1
1
X
AHS = 0 means use the Hsync pin input for Hsync
AHS = 1 means use the SOG pin input for Hsync
The override bit is in Register 10H, Bit 4.
16
This bit reports the status of the Hsync input polarity detection
circuit. It can be used to determine the polarity of the Hsync
input. The detection circuit’s location is shown in the Sync
Processing Block Diagram, Figure 18.
Hsync Polarity
Status
0
1
Table XLIII. Detected Hsync Input Polarity Status
3
7
6
Active Interface
AHS
Detected Hsync Input Polarity Status
Table XLI. Active Interface Results
Table XLII. Active Hsync Results
Register 15H Register 10H
Bit 6
0
1
0
1
X
Bit 4
(Digital
Detection)
0
1
0
1
X
Result
Hsync polarity is negative/active low.
Hsync polarity is positive/active high.
Active Hsync
Override
Bit 4
0
0
0
0
1
Override
0
0
0
0
1
AI
Soft
Power-Down
(Seek Mode)
1
0
Bit 1 in 0FH
Bit 1 in 0FH
AHS
Register 16H
Bit 7
Bit 3 in 10H
1
0
Bit 3 in 10H
Bit 3 in 10H
–30–
16
This bit indicates which Vsync source is being used for the analog
interface: the Vsync input or output from the sync separator.
If the override bit (10H, Bit 1) is set to logic 1, then this bit will be
forced to the same state as Bit 0 in Register 10H.
Vsync Detect
Register 16H
Bit 5
0
1
X
AVS = 0 means Vsync input
AVS = 1 means Sync separator
The override bit is in Register 10H, Bit 1.
16
This bit reports the status of the Vsync output polarity detection
circuit. It can be used to determine the polarity of the Vsync
output. The detection circuit’s location is shown in the Sync
Processing Block Diagram, Figure 18.
Vsync Polarity Status
0
1
16
This bit reports the status of the coast input polarity detection
circuit. The detection circuit’s location is shown in the Sync
Processing Block Diagram, Figure 18. This bit only applies to
the internal Coast and does not apply when Coast is disabled.
Hsync Polarity
Status
0
1
16
This bit reports wherever HDCP keys are detected.
Detect
0
1
1B
The MDA and MCL three-state feature allows the EEPROM to
be programmed in-circuit. The MDA/MCL port must be three-
stated before attempting to program the EEPROM using an
external master. The keys will be stored in an I
3.3 V serial EEPROM of at least 512 bytes. The EEPROM
should have a device address of A0H.
5
4
3
2
7
Table XLVI. Detected Coast Input Polarity Status
Table XLV. Detected Vsync Input Polarity Status
AVS
Detected Vsync Output Polarity Status
Detected Coast Polarity Status
Key Read Verification
MDA and MCL Three-State
Table XLVII. Key Read Verification
Table XLIV. Active Vsync Results
Function
Not detected
Detected
Register 10H
Bit 1
0
0
1
Override
Result
Coast polarity is negative/active low.
Coast polarity is positive/active high.
Active Vsync
Result
Vsync polarity is active high.
Vsync polarity is active low.
2
AVS
0
1
Bit 0 in 10H
C compatible
REV. A