LCMXO2280 Lattice Semiconductor, LCMXO2280 Datasheet - Page 2

• Manufacturer Part Number: LCMXO2280
• Description: (LCMXOxxx) MachXO Family
• Manufacturer: Lattice Semiconductor

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August 2006
Features
■ Non-volatile, Infinitely Reconfigurable
■ Sleep Mode
■ TransFR™ Reconfiguration (TFR)
■ High I/O to Logic Density
■ Embedded and Distributed Memory
Table 1-1. MachXO Family Selection Guide
LUTs
Dist. RAM (Kbits)
EBR SRAM (Kbits)
Number of EBR SRAM Blocks (9 Kbits)
V
Number of PLLs
Max. I/O
Packages
100-pin TQFP (14x14 mm)
144-pin TQFP (20x20 mm)
100-ball csBGA (8x8 mm)
132-ball csBGA (8x8 mm)
256-ball ftBGA (17x17 mm)
324-ball ftBGA (19x19 mm)
CC
Voltage
• Instant-on – powers up in microseconds
• Single chip, no external configuration memory
• Excellent design security, no bit stream to
• Reconfigure SRAM based logic in milliseconds
• SRAM and non-volatile memory programmable
• Supports background programming of
• Allows up to 100x static current reduction
• In-field logic update while system operates
• 256 to 2280 LUT4s
• 73 to 271 I/Os with extensive package options
• Density migration supported
• Lead free/RoHS compliant packaging
• Up to 27.6 Kbits sysMEM™ Embedded Block
• Up to 7.5 Kbits distributed RAM
• Dedicated FIFO control logic
required
intercept
through JTAG port
non-volatile memory
RAM
Device
1.2/1.8/2.5/3.3V
LCMXO256
256
2.0
78
78
78
0
0
0
1-1
MachXO Family Data Sheet
■ Flexible I/O Buffer
■ sysCLOCK™ PLLs
■ System Level Support
Introduction
The MachXO is optimized to meet the requirements of
applications traditionally addressed by CPLDs and low
capacity FPGAs: glue logic, bus bridging, bus interfac-
ing, power-up control, and control logic. These devices
bring together the best features of CPLD and FPGA
devices on a single chip.
1.2/1.8/2.5/3.3V
• Programmable sysIO™ buffer supports wide
• Up to two analog PLLs per device
• Clock multiply, divide, and phase shifting
• IEEE Standard 1149.1 Boundary Scan
• Onboard oscillator
• Devices operate with 3.3V, 2.5V, 1.8V or 1.2V
• IEEE 1532 compliant in-system programming
LCMXO640
range of interfaces:
power supply
− LVCMOS 3.3/2.5/1.8/1.5/1.2
− LVTTL
− PCI
− LVDS, Bus-LVDS, LVPECL, RSDS
640
159
113
101
159
6.0
74
74
0
0
0
1.2/1.8/2.5/3.3V
LCMXO1200
1200
6.25
211
113
101
211
9.2
73
1
1
Introduction
DS1002 Introduction_01.3
Data Sheet DS1002
www.DataSheet4U.com
1.2/1.8/2.5/3.3V
LCMXO2280
2280
27.6
271
113
101
211
271
7.5
73
3
2