W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 34

• Manufacturer Part Number: W90220F
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
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Bits 2
Bits 3
Bits 4-5 RAS# to CAS# delay time during DRAM-read cycles (R2CRD[0:1])
Bits 6-7 RAS# to CAS# delay time during DRAM-write cycles (R2CWR[0:1])
RAM Configuration_3 Register (RAMconf3)
Index : 0x2b
CAS# precharge time (CASPC)
This bit together with RAMconf1[6:7] ("FW, FR") determine CAS# precharge-time during
"DRAM write or read" cycles respectively. Please refer Table 5.2.1-2 and Table 5.2.1-4 to get detail
information.
CAS# active time during DRAM-write (CASWR)
This bit together with RAMconf1[6] ("FW ") determine CAS# active-time during "DRAM
write" cycles. Please refer Table 5.2.1-3 to get detail information.
"R2CRD[0:1]" determine RAS# to CAS# delay during "DRAM-read" cycles if bank or
page is changing at that time.
"R2CWR[0:1]" determine RAS# to CAS# delay during "DRAM-write" cycles if bank or
page is changing at that time.
(Table 5.2.1-7 RAS# to CAS# delay during "read cycle")
(Table 5.2.1-8. RAS# to CAS# delay during "write cycle")
R2CWR[0:1]
R2CRD[0:1]
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
Read/Write
RAS# to CAS# delay
RAS# to CAS# delay
(SYSCLK)
(SYSCLK)
1
2
3
4
1
2
3
4
Power-on Default : 0x09
W90220F
Version 0.84