W90220F Winbond Electronics Corp America, W90220F Datasheet - Page 35

• Manufacturer Part Number: W90220F
• Description: Pa-risc Embedded Controller
• Manufacturer: Winbond Electronics Corp America

The above information is the exclusive intellectual property of Winbond Electroncs Corp. and shall not be dsiclosed or distributed or reproduced without permission from
Winbond.
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Bits 0-1 Refresh Rate (REFRAT[0:1])
Bit 2
Bits 3-4 RAS# assertion to CAS# deassertion (RA2CD[0:1])
Bit 5
Bits 6-7 CAS# active time during DRAM-read (CASRD[0:1])
REFRAT[0:1]
0
REFRAT[0:1] determine the frequence of DRAM refresh cycles.
CAS# deassertion to RAS# deassertion (CD2RD)
These two bits determine the duration between RAS# assertion to CAS# deassertion for CAS-
before-RAS refresh cycle.
CAS# assertion to RAS# assertion (CA2RA)
(Table 5.2.1-9 The frequence of DRAM refresh cycles)
(Table 5.2.1-10 Delay time from RAS# assertion to CAS# deassertion)
0 = The delay time for CAS# deassertion to RAS# deassertion is 1 SYSCLK
1 = The delay time for CAS# deassertion to RAS# deassertion is 2 SYSCLK
0 = The delay time for CAS# assertion to RAS# assertion is 1 SYSCLK
1 = The delay time for CAS# assertion to RAS# assertion is 2 SYSCLK
REFRAT[0:1]
for CAS-before-RAS refresh cycle.
for CAS-before-RAS refresh cycle.
for CAS-before-RAS refresh cycle.
for CAS-before-RAS refresh cycle.
RA2CD[0:1]
1
0 0
0 1
1 0
1 1
0 0
0 1
1 0
1 1
CD2RD
2
Frequence of refresh cycle
3
RA2CD[0:1]
Delay (SYSCLK)
(us)
240
960
15
60
1
2
3
4
4
CA2RA
5
6
CASRD[0:1]
7
W90220F
Version 0.84