UMA1021M/C2 Philips Semiconductors (Acquired by NXP), UMA1021M/C2 Datasheet - Page 18

• Manufacturer Part Number: UMA1021M/C2
• Description: UDA1380; Stereo Audio Coder-decoder For MD, CD And MP3
• Manufacturer: Philips Semiconductors (Acquired by NXP)

Philips Semiconductors
8.9
The operation mode can be set with pin SEL_L3_IIC,
either to L3-bus mode (LOW) or to the I
(HIGH) as given in Table 5.
For all features in microcontroller mode see Chapter 9.
Table 5 Pin function in the selected mode
Remark: In the I
the LSB bit of the address of the UDA1380. In
L3-bus mode this bit is not available, meaning the device
has only one L3-bus device address.
8.10
The UDA1380 has a dedicated reset pin, which has a
pull-down resistor. This way a Power-on reset circuit can
be made with a capacitor and a resistor at the pin. The
internal pull-down resistor cannot be used because of the
5 V tolerant nature of the pad. The pull-down resistor is
shielded from the outside world by a transmission gate in
order to support 5 V tolerance.
The reset timing is determined by the external capacitor
and resistor which are connected to pin RESET, and the
internal pull-down resistor. On Power-on reset, all the
digital sound processing features and the system
controlling features are set to the default setting of the
L3-bus and I
Remark: The reset time should be at least 1 s, and
during the reset time the system clock should be running.
In case the WSPLL is selected as the clock source, a clock
must be connected to the SYSCLK input in order to have
a proper reset of the L3-bus or I
because the clock source is set to SYSCLK by default.
2003 Apr 04
L3CLOCK/SCL
L3MODE
L3DATA/SDA
Stereo audio coder-decoder
for MD, CD and MP3
Application modes
Power-on reset
PIN
2
C-bus control modes.
2
C-bus mode there is a bit A1 which sets
SEL_L3_IIC = L
L3-BUS MODE
L3CLOCK
L3MODE
L3DATA
2
C-bus registers. This is
2
SEL_L3_IIC = H
I
C-bus mode
2
C-BUS MODE
SDA
SCL
A1
18
8.11
The following blocks have power-down control via the
L3-bus or I
Clocks of the decimator, interpolator and the analog blocks
have separate enable and disable controls.
Microphone amplifier (LNA) including its Single-Ended
to Differential Converter (SDC) and VGA
ADC plus SDC and the PGA, for left and right separate
Bias generation circuit for the front-end and the FSDAC
Headphone driver
WSPLL
FSDAC.
Power-down requirements
2
C-bus interface:
Product specification
UDA1380