ISL5585 Intersil Corporation, ISL5585 Datasheet - Page 20

• Manufacturer Part Number: ISL5585
• Description: 3.3 Volt Ringing Slic Family For Voice Over Broadband (VOB)
• Manufacturer: Intersil Corporation

U1 - Ringing SLIC
R
R
R
R
R
R
R
R
R
C
C
C
C
D
R
Standard applications will use ≥ 49Ω per side. Protection resistor
values are application dependent and will be determined by
protection requirements.
Design Parameters: Ring Trip Threshold = 76mA
Hook Threshold = 12mA, Loop Current Limit = 24.6mA, Synthesize
Device Impedance = (3*66.5kΩ)/400 = 498.8Ω, with 49.9Ω
protection resistors, impedance across Tip and Ring
terminals = 599Ω. Transient current limit = 95mA.
V
+
-
TL
RT
SH
IL
S
F
A
B
IN
RS
DC
PS1
PS2
1
P1
2W
TABLE 2. ISL5585 3V APPLICATION CIRCUIT COMPONENTS
, R
, C
, C
, C
P2
COMPONENT
FB
TX
PS3
600Ω
, C
C
RS
RT
C
C
R
R
, C
49.9Ω
PS3
R
49.9Ω
R
C
R
RT
RT
SH
IL
P2
DC
C
P1
POL
PS2
C
PS1
TIP
RING
RT
SH
ILIM
VRS
AGND
VCC VBL VBH
ISL5585
1N400X type with breakdown > 100V.
20
42.2KkΩ
ISL5585
VALUE
18.7kΩ
23.7kΩ
49.9kΩ
71.5kΩ
66.5kΩ
30.1kΩ
36.5kΩ
45.3kΩ
0.47µF
4.7µF
0.1µF
0.1µF
U
1
BGND
CDC
POL
AUX
VFB
VTX
TL
-IN
D
1
FIGURE 17. ISL5585 3.3V APPLICATION CIRCUIT
1N4004
TOL
20%
20%
20%
20%
N/A
1%
1%
1%
1%
1%
1%
1%
1%
1%
R
C
PEAK
R
S
POL
TL
0.47uF
, Switch
C
66.5kΩ
FB
RATING
>100V
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
0.1W
100V
V
6.3V
10V
N/A
CC
PCM to V
V
0 dBm0, CODEC output voltage = 0.531Vrms
0 dBm0, V
Design Equations
R
Gain PCM to V
V
2W
2W
S
ISL5585
= 133.33(Z
to PCM Gain = -9.3 dB, digital gain set to 0dB
to PCM Gain = V
dB Gain =20log (0.7795/ 0.531) = +3.33dB
dB Gain =20log (0.267/0.7795) = - 9.3dB
2W
2W
Gain = +3.33dB, digital gain set to 0dB
= 0.7795Vrms
L
Special Considerations for the QFN
Package
The new Quad Flatpack No-lead (QFN) package offers a
significant footprint reduction (65%) and improved thermal
performance with respect to the 28 lead PLCC. To realize
the thermal enhancements and maintain the high voltage
(-100V) performance, the exposed pad on the bottom of the
QFN package should be soldered to a power/heat sink plane
that is electrically connected to the ISL5585 Substrate
Common Connection (SCC) pin. The heat is distributed
evenly across the board by way of the heat sink plane. This
is accomplished by using conductive thermal vias.
Reference technical brief TB379 and AN9922 for additional
information on thermal characterization and board layout
considerations.
2W
- 2R
= R
36.5kΩ
45.3kΩ
P
R
R
)
2W
S
A
IN
/R
(G
IN
2-4
= 66.5k/45.3k =1.46
0.47uF
)(R
F
/R
0.47uF
A
) = (0.7795)(0.416)(30.1k/36.5k) = 0.267
30.1kΩ
42.2kΩ
R
B
R
F
+2.4V
-
+
TX IN
CODEC
Digital
Gain
0dB
Digital
Gain
0dB
PCM
PCM