PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 117

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PIC17C42

Manufacturer Part Number
PIC17C42
Description
High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
Manufacturer
Microchip Technology
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CALL
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
1996 Microchip Technology Inc.
Before Instruction
After Instruction
Forced NOP
Decode
PC =
PC =
TOS =
Q1
Read literal
Address(HERE)
Address(THERE)
Address (HERE + 1)
Subroutine Call
[ label ] CALL k
0
PC+ 1
k<12:8>
PC<15:13>
Subroutine call within 8K page. First,
return address (PC+1) is pushed onto
the stack. The 13-bit value is loaded into
PC bits<12:0>. Then the upper-eight
bits of the PC are copied into PCLATH.
Call is a two-cycle instruction.
See LCALL for calls outside 8K memory
space.
1
2
HERE
None
'k'<7:0>
NOP
111k
Q2
k
4095
TOS, k
kkkk
CALL
PCLATH<4:0>;
Execute
Execute
PCLATH<7:5>
Q3
THERE
PC<12:0>,
kkkk
NOP
NOP
Q4
kkkk
CLRF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
FLAG_REG
FLAG_REG
Q1
register 'f'
Clear f
[ label ] CLRF
0
00h
00h
None
Clears the contents of the specified reg-
ister(s).
s = 0: Data memory location 'f' and
WREG are cleared.
s = 1: Data memory location 'f' is
cleared.
1
1
CLRF
Read
0010
Q2
=
=
f
255
f, s
dest
0x5A
0x00
PIC17C4X
100s
Execute
[0,1]
FLAG_REG
f,s
Q3
DS30412C-page 117
ffff
register 'f'
and other
specified
register
Write
Q4
ffff

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