PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 232

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PIC17C42

Manufacturer Part Number
PIC17C42
Description
High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
Manufacturer
Microchip Technology
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PIC17C4X
Figure 6-12:
Figure 6-13:
Figure 7-1:
Figure 7-2:
Figure 7-3:
Figure 7-4:
Figure 7-5:
Figure 7-6:
Figure 7-7:
Figure 7-8:
Figure 9-1:
Figure 9-2:
Figure 9-3:
Figure 9-4:
Figure 9-5:
Figure 9-6:
Figure 9-7:
Figure 9-8:
Figure 9-9:
Figure 11-1:
Figure 11-2:
Figure 11-3:
Figure 11-4:
Figure 11-5:
Figure 12-1:
Figure 12-2:
Figure 12-3:
Figure 12-4:
Figure 12-5:
Figure 12-6:
Figure 12-7:
Figure 12-8:
Figure 12-9:
Figure 12-10: TMR1, TMR2, and TMR3 Operation in
Figure 13-1:
Figure 13-2:
Figure 13-3:
Figure 13-4:
Figure 13-5:
Figure 13-6:
Figure 13-7:
Figure 13-8:
Figure 13-9:
Figure 13-10: Synchronous Transmission
Figure 13-11: Synchronous Reception (Master Mode,
Figure 14-1:
Figure 14-2:
DS30412C-page 232
Program Counter using The CALL and
GOTO Instructions...................................... 41
BSR Operation (PIC17C43/R43/44) ........... 42
TLWT Instruction Operation........................ 43
TABLWT Instruction Operation................... 43
TLRD Instruction Operation ........................ 44
TABLRD Instruction Operation ................... 44
TABLWT Write Timing
(External Memory) ...................................... 46
Consecutive TABLWT Write Timing
(External Memory) ...................................... 47
TABLRD Timing.......................................... 48
TABLRD Timing (Consecutive TABLRD
Instructions) ................................................ 48
RA0 and RA1 Block Diagram ..................... 53
RA2 and RA3 Block Diagram ..................... 54
RA4 and RA5 Block Diagram ..................... 54
Block Diagram of RB<7:4> and RB<1:0>
Port Pins ..................................................... 55
Block Diagram of RB3 and RB2 Port Pins.. 56
Block Diagram of RC<7:0> Port Pins ......... 58
PORTD Block Diagram
(in I/O Port Mode) ....................................... 60
PORTE Block Diagram
(in I/O Port Mode) ....................................... 62
Successive I/O Operation ........................... 64
T0STA Register (Address: 05h,
Unbanked) .................................................. 67
Timer0 Module Block Diagram ................... 68
TMR0 Timing with External Clock
(Increment on Falling Edge) ....................... 68
TMR0 Timing: Write High or Low Byte ....... 69
TMR0 Read/Write in Timer Mode ............... 70
TCON1 Register (Address: 16h, Bank 3) ... 71
TCON2 Register (Address: 17h, Bank 3) ... 72
Timer1 and Timer2 in Two 8-bit
Timer/Counter Mode................................... 73
TMR1 and TMR2 in 16-bit Timer/Counter
Mode........................................................... 74
Simplified PWM Block Diagram .................. 75
PWM Output ............................................... 75
Timer3 with One Capture and One
Period Register Block Diagram................... 78
Timer3 with Two Capture Registers
Block Diagram ............................................ 79
TMR1, TMR2, and TMR3 Operation in
External Clock Mode................................... 80
Timer Mode................................................. 81
TXSTA Register (Address: 15h, Bank 0) .... 83
RCSTA Register (Address: 13h, Bank 0) ... 84
USART Transmit......................................... 85
USART Receive.......................................... 85
Asynchronous Master Transmission........... 90
Asynchronous Master Transmission
(Back to Back) ............................................ 90
RX Pin Sampling Scheme .......................... 91
Asynchronous Reception............................ 92
Synchronous Transmission ........................ 94
(Through TXEN) ......................................... 94
SREN)......................................................... 95
Configuration Word..................................... 99
Crystal or Ceramic Resonator Operation
(XT or LF OSC Configuration) .................. 100
Figure 14-3:
Figure 14-4:
Figure 14-5:
Figure 14-6:
Figure 14-7:
Figure 14-8:
Figure 14-9:
Figure 15-1:
Figure 15-2:
Figure 17-1:
Figure 17-2:
Figure 17-3:
Figure 17-4:
Figure 17-5:
Figure 17-6:
Figure 17-7:
Figure 17-8:
Figure 17-9:
Figure 17-10: USART Module: Synchronous Receive
Figure 17-11: Memory Interface Write Timing ................ 161
Figure 17-12: Memory Interface Read Timing ................ 162
Figure 18-1:
Figure 18-2:
Figure 18-3:
Figure 18-4:
Figure 18-5:
Figure 18-6:
Figure 18-7:
Figure 18-8:
Figure 18-9:
Figure 18-10: Maximum I
Figure 18-11: Typical I
Figure 18-12: Maximum I
Figure 18-13: WDT Timer Time-Out Period vs. V
Figure 18-14: I
Figure 18-15: I
Figure 18-16: I
Figure 18-17: I
Figure 18-18: V
Figure 18-19: V
Figure 18-20: V
Figure 19-1:
Crystal Operation, Overtone Crystals
(XT OSC Configuration) ........................... 101
External Clock Input Operation
(EC OSC Configuration)........................... 101
External Parallel Resonant Crystal
Oscillator Circuit ....................................... 102
External Series Resonant Crystal
Oscillator Circuit ....................................... 102
RC Oscillator Mode .................................. 102
Watchdog Timer Block Diagram............... 104
Wake-up From Sleep Through Interrupt... 105
General Format for Instructions................ 108
Q Cycle Activity ........................................ 109
Parameter Measurement Information....... 154
External Clock Timing .............................. 155
CLKOUT and I/O Timing .......................... 156
Reset, Watchdog Timer,
Oscillator Start-Up Timer and
Power-Up Timer Timing ........................... 157
Timer0 Clock Timings............................... 158
Timer1, Timer2, And Timer3 Clock
Timings..................................................... 158
Capture Timings ....................................... 159
PWM Timings ........................................... 159
USART Module: Synchronous
Transmission (Master/Slave) Timing ........ 160
(Master/Slave) Timing .............................. 160
Typical RC Oscillator Frequency
vs. Temperature ....................................... 163
Typical RC Oscillator Frequency
vs. V
Typical RC Oscillator Frequency
vs. V
Typical RC Oscillator Frequency
vs. V
Transconductance (gm) of LF Oscillator
vs. V
Transconductance (gm) of XT Oscillator
vs. V
Typical I
Clock 25 C) .............................................. 167
Maximum I
Clock 125 C to -40 C) .............................. 167
Typical I
Disabled 25 C .......................................... 168
Disabled ................................................... 168
Enabled 25 C ........................................... 169
Enabled .................................................... 169
I/O Pins (TTL)
V
Input (In XT and LF Modes) vs. V
Parameter Measurement Information....... 183
OH
OH
OL
OL
TH
TH
DD
TH
vs. V
vs. V
vs. V
vs. V
, V
........................................................... 173
(Input Threshold Voltage) of
(Input Threshold Voltage) of OSC1
DD
DD
DD
DD
DD
IL
..................................................... 164
..................................................... 164
..................................................... 165
..................................................... 166
..................................................... 166
DD
PD
PD
OL
OL
of I/O Pins (Schmitt Trigger)
OH
OH
DD
PD
PD
, V
, V
vs. V
vs. V
vs. Frequency (External
, V
, V
DD
DD
1996 Microchip Technology Inc.
vs. V
vs. V
vs. Frequency (External
DD
DD
VS
DD
DD
= 3V............................... 171
= 5V............................... 172
. V
= 3V.............................. 170
= 5V.............................. 171
DD
DD
Watchdog
Watchdog
DD
Watchdog
Watchdog
............................. 172
DD
DD
........ 173
VS
...... 170
.

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