PIC17C42 Microchip Technology, PIC17C42 Datasheet - Page 24

• Manufacturer Part Number: PIC17C42
• Description: High-Performance 8-Bit CMOS EPROM/ROM Microcontroller
• Manufacturer: Microchip Technology

PIC17C4X
5.3
This register contains the individual flag bits for the
peripheral interrupts.
FIGURE 5-4: PIR REGISTER (ADDRESS: 16h, BANK 1)
DS30412C-page 24
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
R/W - 0 R/W - 0 R/W - 0 R/W - 0 R/W - 0 R/W - 0
RBIF
Peripheral Interrupt Request Register
(PIR)
RBIF : PORTB Interrupt on Change Flag bit
1 = One of the PORTB inputs changed (Software must end the mismatch condition)
0 = None of the PORTB inputs have changed
TMR3IF : Timer3 Interrupt Flag bit
If Capture1 is enabled (CA1/PR3 = 1)
1 = Timer3 overflowed
0 = Timer3 did not overflow
If Capture1 is disabled (CA1/PR3 = 0)
1 = Timer3 value has rolled over to 0000h from equalling the period register (PR3H:PR3L) value
0 = Timer3 value has not rolled over to 0000h from equalling the period register (PR3H:PR3L) value
TMR2IF : Timer2 Interrupt Flag bit
1 = Timer2 value has rolled over to 0000h from equalling the period register (PR2) value
0 = Timer2 value has not rolled over to 0000h from equalling the period register (PR2) value
TMR1IF : Timer1 Interrupt Flag bit
If Timer1 is in 8-bit mode (T16 = 0)
1 = Timer1 value has rolled over to 0000h from equalling the period register (PR) value
0 = Timer1 value has not rolled over to 0000h from equalling the period register (PR2) value
If Timer1 is in 16-bit mode (T16 = 1)
1 = TMR1:TMR2 value has rolled over to 0000h from equalling the period register (PR1:PR2) value
0 = TMR1:TMR2 value has not rolled over to 0000h from equalling the period register (PR1:PR2) value
CA2IF : Capture2 Interrupt Flag bit
1 = Capture event occurred on RB1/CAP2 pin
0 = Capture event did not occur on RB1/CAP2 pin
CA1IF : Capture1 Interrupt Flag bit
1 = Capture event occurred on RB0/CAP1 pin
0 = Capture event did not occur on RB0/CAP1 pin
TXIF : USART Transmit Interrupt Flag bit
1 = Transmit buffer is empty
0 = Transmit buffer is full
RCIF : USART Receive Interrupt Flag bit
1 = Receive buffer is full
0 = Receive buffer is empty
TMR3IF TMR2IF TMR1IF
CA2IF
CA1IF
R - 1
TXIF
Note:
RCIF
R - 0
bit0
These bits will be set by the specified con-
dition, even if the corresponding interrupt
enable bit is cleared (interrupt disabled), or
the GLINTD bit is set (all interrupts dis-
abled). Before enabling an interrupt, the
user may wish to clear the interrupt flag to
ensure that the program does not immedi-
ately branch to the peripheral interrupt ser-
vice routine.
R = Readable bit
W = Writable bit
-n = Value at POR reset
1996 Microchip Technology Inc.