AN2104 Freescale Semiconductor, AN2104 Datasheet - Page 6

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AN2104

Manufacturer Part Number
AN2104
Description
Using Background Debug Mode
Manufacturer
Freescale Semiconductor
Datasheet
Application Note
BDM Registers
6
NOTE:
Single-Chip
Peripheral:
Address: $FF01
Seven BDM registers are mapped into addresses $FF00–$FF06. See
Table
Remember that the BDM firmware ROM and registers contain different
data than the normal memory mapped locations for these addresses.
Only two registers are discussed here:
The BDM status register can be read at any time, but must not be written
to during BDM operation. See
This register can be read or written by BDM commands or firmware.
ENBDM — Enable BDM Bit (permit active background debug mode)
Reset:
Read:
Write:
Freescale Semiconductor, Inc.
$FF02–$FF03
$FF04–$FF05
For More Information On This Product,
0 = BDM cannot be made active (hardware commands still
1 = BDM can be made active to allow firmware commands.
BDM status register (STATUS)
BDM CCR (condition code register) holding register (CCRSAV)
3.
Address
ENBDM
$FF00
$FF01
$FF06
Bit 7
allowed).
0
1
Figure 3. BDM Status Register (STATUS)
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EDMACT
6
0
0
BDM instruction register
BDM status register
BDM shift register
BDM address register
BDM CCR holding register
Table 3. BDM Registers
ENTAG
5
0
0
Figure 3
Register
SDV
4
0
0
for a description of the bits.
TRACE
3
0
0
2
0
0
0
INSTRUCTION
Mnemonic
ADDRESS
SHIFTER
CCRSAV
STATUS
1
0
0
0
AN2104
Bit 0
0
0
0

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