AN2104 Freescale Semiconductor, AN2104 Datasheet - Page 7

• Manufacturer Part Number: AN2104
• Description: Using Background Debug Mode
• Manufacturer: Freescale Semiconductor

Operation
of Active BDM
AN2104
Address: $FF06
BDMACT — Background Mode Active Status Bit
ENTAG — Instruction Tagging Enable Bit
SDV — Shifter Data Valid Bit
TRACE
The second register of interest is the BDM CCR holding register. This
register contains the value of the CPU’s condition code register (CCR)
from the user’s program upon entering the BDM. See
Here is a brief description of what transpires when going into the active
BDM:
Reset:
Read:
Write:
Set by the TAGGO instruction and cleared when BDM is entered
Shows that valid data is in the serial interface shift register. Used by
firmware-based instructions.
Asserted by the TRACE1 instruction
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0 = BDM not active
1 = BDM active and waiting for serial commands
0 = Tagging not enabled or BDM active
1 = Tagging active (BDM cannot process serial commands while
0 = No valid data
1 = Valid data
When the CPU gets the command to go into the BDM, the user’s
return address is stored in a temporary register.
Next, the BDM ROM is turned on and the CPU fetches a vector
that points to the beginning of the BDM firmware program.
CCR7
Bit 7
Figure 4. BDM CCR Holding Register (CCRSAV)
tagging is active.)
0
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CCR6
6
0
CCR5
5
0
CCR4
4
0
CCR3
3
0
CCR2
2
0
Figure
Theory of Operation
CCR1
Application Note
1
0
4.
CCR0
Bit 0
0
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