IDT5T2010 Integrated Device Technology, IDT5T2010 Datasheet - Page 18

• Manufacturer Part Number: IDT5T2010
• Description: 2.5v Zero Delay Pll Clock Driver Teraclock
• Manufacturer: Integrated Device Technology

AC TIMING DIAGRAM
NOTE:
1. The AC TIMING DIAGRAM applies to PE = V
IDT5T2010
2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK
edge of REF
Q DIVIDED BY 2
Q DIVIDED BY 4
INVERTED Q
[1:0]
, and the positive edges of the divide-by-2 and divide-by-4 signals align.
OTHER Q
REF
REF
FB
FB
Q
(1)
DD
. For PE = GND, the negative edge of FB aligns with the negative edge of REF
t
t
t
t
SK1(),
SK2(INV)
SK(B)
t
t
SK(O),
SK2(),
SK2(INV)
t
RPWH
t
t
ODCV
ODCV
18
t
t
SK2(INV)
SK1(INV)
t
RPWL
t
t
ODCV
ODCV
t
t
SK(B)
SK(O),
t
FPWH
t
INDUSTRIAL TEMPERATURE RANGE
FPWL
[1:0]
t
, divided outputs change on the negative
SK1(INV)
t
t
SK2()
SK1()