IDT5T2010 Integrated Device Technology, IDT5T2010 Datasheet - Page 6

• Manufacturer Part Number: IDT5T2010
• Description: 2.5v Zero Delay Pll Clock Driver Teraclock
• Manufacturer: Integrated Device Technology

EXTERNAL DIFFERENTIAL FEEDBACK
gives users flexibility with regard to divide selection. The FB and FB/
V
signals at the phase detector in order to drive the VCO. Phase differ-
ences cause the VCO of the PLL to adjust upwards or downwards
accordingly.
DIVIDE SELECTION TABLE
NOTE:
1. Permissible output division ratios connected to FB and FB/V
CONTROL SUMMARY TABLE FOR ALL
OUTPUTS
IDT5T2010
2.5V ZERO DELAY PLL CLOCK DRIVER TERACLOCK
REF2
By providing a dedicated external differential feedback, the IDT5T2010
frequency multiplication by using an undivided output for FB and FB/V
nF
signals are compared with the input REF
2
/FBF
H
H
L
L
2
DS [
M M
M H
H M
H H
LM
LH
ML
HL
LL
1:0
]
nF
1
/FBF
H
H
L
L
1
[1:0]
Output Skew
and REF
Divide by 2
Divide by 4
Zero Delay
REF
Inverted
Divide-by-n
2
. The frequencies of the REF
10
12
2
3
4
5
1
6
8
[1:0]
REF
/V
2
and setting DS[
REF[1:0]
6
phase detector. The loop filter transfer function has been chosen to
provide minimal jitter (or frequency variation) while still providing accu-
rate responses to input frequency changes.
1:0
An internal loop filter moderates the response of the VCO to the
] to N (N = 1-6, 8, 10, 12).
[1:0]
Permitted Output Divide-by-n connected to FB and FB/V
and REF
[1:0]
/V
REF
[1:0]
inputs will be F
INDUSTRIAL TEMPERATURE RANGE
1, 2, 4
1, 2
1, 2
1, 2
1, 2
1
1
1
1
NOM
/N when the parts are configured for
REF2 (1)