UPD784035YGC NEC, UPD784035YGC Datasheet - Page 50

• Manufacturer Part Number: UPD784035YGC
• Description: 16-/8-BIT SINGLE-CHIP MICROCONTROLLERS
• Manufacturer: NEC

8.5
When data n (last byte) has been transferred to TXS (when the transfer data storage buffer has become empty),
vectored interrupt request (INTST) is generated.
data n (last byte) has been transferred to memory (when the receive data storage buffer has become full), vectored
interrupt request (INTSR) is generated.
50
(1) Transfer of serial interface
(2) Reception of serial interface
Each time macro service request (INTST) is generated, the next transfer data is transferred from memory to TXS.
Each time macro service request (INTSR) is generated, the receive data is transferred from RXB to memory. When
Application Example of Macro Service
RxD
TxD
Transfer data storage buffer (memory)
Receive data storage buffer (memory)
Transfer shift register TXS(SFR)
Receive shift register
Reception control
Transfer control
Receive buffer
Internal bus
Internal bus
Data n–1
Data n–1
PD784035Y, 784036Y, 784037Y, 784038Y
Data n
Data 2
Data 1
Data n
Data 2
Data 1
RXB(SFR)
INTST
INTSR