UPD784035YGC NEC, UPD784035YGC Datasheet - Page 71

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UPD784035YGC

Manufacturer Part Number
UPD784035YGC
Description
16-/8-BIT SINGLE-CHIP MICROCONTROLLERS
Manufacturer
NEC
Datasheet
SERIAL OPERATION (T
Serial clock cycle time
(SCK0)
Serial clock low-level
width (SCK0)
Serial clock high-level
width (SCK0)
SI0 setup time
(to SCK0 )
SI0 hold time
(from SCK0 )
SO0 output delay time
(from SCK0 )
SCL clock frequency
Hold time of SCL clock
low-level state
Hold time of SCL clock
high-level state
Data hold time
Data setup time
Rising time of SDA and
SCL signals
Falling time of SDA and t
SCL signals
Load capacitance of
each bus line
(1) CSI
(2) I
Remarks 1. The values in this table are those when C
Parameter
Parameter
2
C
2. T: Serial clock cycle set by software. The minimum value is 16/f
3. f
XX
: Oscillation frequency
Symbol
Symbol
t
t
t
t
t
t
t
f
t
t
t
t
t
Cb
CYSK0
WSKL0
WSKH0
SSSK0
HSSK0
SCL
LOW
HD
SU
R
F
DSBSK1
DSBSK2
HIGH
A
; DAT
; DAT
= –40 to +85 C, V
Input
Output
Input
Output
Input
Output
CMOS push-pull output
(3-wire serial I/O mode)
Open-drain output
(2-wire serial I/O mode), R
MIN.
300
250
Standard mode I
f
4.7
4.0
XX
0
= 4 to 32 MHz
External clock
When SCK0 and SO0 are CMOS I/O
External clock
When SCK0 and SO0 are CMOS I/O
External clock
When SCK0 and SO0 are CMOS I/O
PD784035Y, 784036Y, 784037Y, 784038Y
DD
Conditions
= +2.7 to 5.5 V, AV
2
C bus
L
MAX.
1000
100
300
400
= 1 k
L
is 100 pF.
SS
= V
20+0.1Cb
20+0.1Cb
f
High-speed mode I
MIN.
XX
300
100
SS
1.3
0.6
0
= 8 to 32 MHz
= 0 V)
10/f
5/f
5/f
0.5T–40
0.5T–40
5/f
XX
MIN.
XX
XX
XX
XX
.
40
T
0
0
+150
+150
+40
+380
2
5/f
5/f
C bus
MAX.
400
900
300
300
400
MAX.
XX
XX
+150
+400
Unit
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
71
s
s
s
s
s

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