FDC37M81x SMSC Corporation, FDC37M81x Datasheet - Page 179

• Manufacturer Part Number: FDC37M81x
• Description: PC98/99 Compliant Enhanced Super I/O Controller
• Manufacturer: SMSC Corporation

Note 1: tBR is 1/Baud Rate. The Baud Rate is programmed through the divisor latch registers. Baud
NAME
NAME
NAME
nRTSx,
nDTRx
t1
nIOW
t1
t1
t2
PCI_CLK
SER_IRQ
Rates have percentage errors indicated in the “Baud Rate” table in the “Serial Port” section.
TXD1, 2
nRTSx, nDTRx Delay from nIOW
Serial Port Data Bit Time
SER_IRQ Setup Time to PCI_CLK Rising
SER_IRQ Hold Time to PCI_CLK Rising
Data
Start
FIGURE 12C – SETUP AND HOLD TIME
FIGURE 12A - SERIAL PORT TIMING
DESCRIPTION
FIGURE 12B – SERIAL PORT DATA
DESCRIPTION
DESCRIPTION
t1
t1
Data (5-8 Bits)
179
t1
MIN
MIN
MIN
t2
7
0
Parity
tBR1
TYP
TYP
TYP
Stop (1-2 Bits)
MAX
MAX
MAX
200
UNITS
UNITS
UNITS
nsec
nsec
nsec
ns