LM3S102 Luminary Micro, Inc, LM3S102 Datasheet - Page 255

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LM3S102

Manufacturer Part Number
LM3S102
Description
Lm3s102 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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July 6, 2006
Reset
Reset
Type
Type
SSI Peripheral Identification 0 (SSIPeriphID0)
Offset 0xFEO
Bit/Field
RO
RO
31
15
0
0
31:8
7:0
Register 14: SSI Peripheral Identification 0 (SSIPeriphID0), offset 0xFE0
The SSIPeriphIDn registers are hard-coded and the fields within the register determine the reset
value.
RO
RO
30
14
0
0
reserved
Name
PID0
RO
RO
29
13
0
0
RO
RO
28
12
0
0
reserved
Type
RO
RO
27
11
0
0
RO
RO
RO
RO
26
10
0
0
Reset
0x22
RO
RO
25
0
0
9
0
Preliminary
RO
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
SSI Peripheral ID Register[7:0]
Can be used by software to identify the presence of this
peripheral.
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
1
RO
RO
20
0
4
0
PID0
RO
RO
19
0
3
0
LM3S102 Data Sheet
RO
RO
18
0
2
0
RO
RO
17
0
1
1
RO
RO
16
0
0
0
255

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