MT8980DE1 Zarlink Semiconductor, Inc., MT8980DE1 Datasheet - Page 6

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MT8980DE1

Manufacturer Part Number
MT8980DE1
Description
256 x 256 Channels (8 TDM Streams at 2.048 Mbps) Non-blocking Digital Switch (DX)
Manufacturer
Zarlink Semiconductor, Inc.
Datasheet

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MT8980D
2-8
*If bit 2 of the corresponding Connection High location is 1 or if bit 6 of the Control Register is 1, then these entire
8 bits are output on the channel and stream associated with this location. Otherwise, the bits are used as indicated
to define the source of the connection which is output on the channel and stream associated with this location.
7-5*
4-0*
BIT
BIT
2
1
0
Message
CSTo Bit
Channel
Address
Channel
Address
Stream
Output
Enable
NAME
NAME
Bits*
Bits*
When 1, the contents of the corresponding location in Connection Memory Low are
output on the location’s channel and stream. When 0, the contents of the corresponding
location in Connection Memory Low act as an address for the Data Memory and so
determine the source of the connection to the location’s channel and stream.
This bit is output on the CSTo pin one channel early. The CSTo bit for stream 0 is output
first.
If the ODE pin is high and bit 6 of the Control Register is 0, then this bit enables the
output driver for the location’s channel and stream. This allows individual channels on
individual streams to be made high-impedance, allowing switching matrices to be
constructed. A 1 enables the driver and a 0 disables it.
The number expressed in binary notation on these 3 bits is the number of the ST-BUS
stream for the source of the connection. Bit 7 is the most significant bit. e.g., if bit 7 is 1,
bit 6 is 0 and bit 5 is 0, then the source of the connection is a channel on STi4.
The number expressed in binary notation on these 5 bits is the number of the channel
which is the source of the connection (The ST-BUS stream where the channel lies is
defined by bits 7, 6 and 5.). Bit 4 is the most significant bit. e.g., if bit 4 is 1, bit 3 is 0, bit 2
is 0, bit 1 is 1 and bit 0 is 1, then the source of the connection is channel 19.
7
7
Figure 5 - Connection Memory High Bits
Figure 6 - Connection Memory Low Bits
Address
Stream
No Corresponding Memory
- These bits give 0s if read.
Bits
6
6
5
5
4
4
3
3
DESCRIPTION
DESCRIPTION
Channel
Address
Bits
2
2
Per Channel
Control Bits
1
1
0
0

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