74f114sc NXP Semiconductors, 74f114sc Datasheet - Page 3

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74f114sc

Manufacturer Part Number
74f114sc
Description
Dual J-k Negative Edge-triggered Flip-flop With Common Clock And Reset
Manufacturer
NXP Semiconductors
Datasheet
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
4. Measure I
Philips Semiconductors
RECOMMENDED OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
NOTES:
1996 Mar 14
V
V
V
I
I
I
T
V
V
V
V
V
I
I
I
I
I
I
I
IK
OH
OL
I
IH
IL
IL
OS
CC
SYMBOL
SYMBOL
SYMBOL
SYMBOL
amb
CC
IH
IL
OH
OH
OL
OL
IK
Dual J-K negative edge-triggered flip-flop
with common clock and reset
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
CC
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
High-level output voltage
High-level output voltage
Low-level output voltage
Low-level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
L
Low-level input current
Low-level input current
Short-circuit output current
Supply current (total)
with the clock input grounded and all outputs open, with the Q and Q outputs High in turn.
l
l i
CC
PARAMETER
PARAMETER
= 5V, T
OS
4
tests should be performed last.
amb
3
= 25 C.
PARAMETER
PARAMETER
Jn, Kn
SDn
CP
RD
V
V
V
V
V
V
V
V
V
V
V
V
CC
IH
CC
IH
CC
CC
CC
CC
CC
CC
CC
= MIN, I
= MIN, I
= MIN, V
= MIN, V
= MIN, I
= MAX, V
= MAX, V
= MAX V
= MAX, V
= MAX
= MAX
MAX V
TEST CONDITIONS
TEST CONDITIONS
OS
3
, the use of high-speed test apparatus and/or sample-and-hold
OH
OL
I
IL
IL
= I
I
I
I
I
= MAX
= MAX
= 7.0V
= 2.7V
= 0 5V
= 0.5V
= MAX
= MAX
IK
0 5V
10%V
10%V
5%V
5%V
1
1
MIN
CC
CC
4.5
2.0
CC
CC
0
MIN
–60
2.5
2.7
LIMITS
NOM
5.0
LIMITS
TYP
–0.73
0.35
0.35
3.4
15
2
MAX
–18
+70
5.5
0.8
–1
20
MAX
–150
0.50
0.50
–1.2
–0.6
–4.8
–3.0
–6.0
100
Product specification
20
21
74F114
UNIT
UNIT
UNIT
UNIT
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
V
V
V
V
V
V
C
A
A

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