isl59911 Intersil Corporation, isl59911 Datasheet
isl59911
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isl59911 Summary of contents
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... Cat 5 cable (by an ISL59311, EL4543, or similar device can output the actual common mode voltages for each of the three channels. The ISL59911 is available QFN package and is specified for operation over the full -40°C to +85°C temperature range 300m OF ...
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... Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free 21 G OUT requirements of IPC/JEDEC J STD-020 For Moisture Sensitivity Level (MSL), please see device information page for ISL59911. For more information on MSL please see techbrief TB363 OUT V- 17 ...
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... Digital Input. Chip enable logic signal. 0V: All analog circuitry turned off to reduce current. 5V: Normal operation. 15 GND Power Supply Pin. Ground reference for ISL59911. This pin must be tied to GND Analog Input. Blue channel analog offset reference voltage. Typically tied to GND. REF ...
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... Corner Freq of Noise Filter, High NOISE_MIN f -3dB Corner Freq of Noise Filter, Low NOISE_MAX SR Output Slew Rate DIFF THD Total Harmonic Distortion 4 ISL59911 Thermal Information (T = +25°C) A Thermal Resistance (Typical QFN (Notes ±1V/µs Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Die Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+150°C Pb-Free Reflow Profile ...
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... SDA) Guaranteed to be Rejected ENABLE, ADDR0, ADDR1 PINS V Input High Level IH V Input Low Level IL I Input Leakage Current LEAKAGE NOTE: 7. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 5 ISL59911 = +5V CONDITIONS 10k || 5pF load ...
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... FIGURE 4. FREQUENCY RESPONSE vs 100MHz BITS 4:2 20 CODE 0 FREQUENCY (MHz) FIGURE 6. FREQUENCY RESPONSE vs 20MHz BITS 7:4 6 ISL59911 0.01 100 1000 FIGURE 3. FREQUENCY RESPONSE vs 100MHz BITS 1 ...
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... Typical Performance Curves 6 5 CODE CODE 00 -1 0.01 0.1 1 FREQUENCY (MHz) FIGURE 8. FREQUENCY RESPONSE vs 1MHz BITS 7:4 FIGURE 10. FREQUENCY RESPONSE vs LOW PASS FILTER BITS 3:0 7 ISL59911 (Continued) 2.0 1.5 1.0 0.5 0 -0.5 -1.0 10 100 1000 0.01 FIGURE 9. FREQUENCY RESPONSE vs 200kHz BITS 3 CODE 0A -10 CODE 0B -20 -30 CODE 0F -40 ...
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... Red Channel Manual Offset (0x00) (Default is auto-calibrated) 0x0A Green Channel Manual Offset (0x00) (Default is auto-calibrated) 8 ISL59911 BIT(S) FUNCTION NAME 3:0 Device Revision 0 = initial silicon first revision, etc. 7:4 Device ID 0x10 = ISL59911 0 Output Configuration SYNC 1: V (like EL9112 and ISL59913 Nominal Gain 0: 0dB (1V/V) 1: 6dB (2V/V) 2 ...
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... Blue Channel Manual Offset (0x00) (Default is auto-calibrated) 0x0C Offset Calibration Control (0x00) 0x0D - 0x12 Reserved 0x13 Initialization NOTE: All registers are read/write unless otherwise noted. 9 ISL59911 BIT(S) FUNCTION NAME 6:0 Blue Offset 0x00: -400mV Offset 0x7F: +400mV Offset (Output Referred) 7 Manual Offset Control ...
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... A 10μF capacitor on each of the V+ and V- supplies provides sufficient low-frequency decoupling. The 10μF capacitors do not need to be particularly close to the ISL59911 to be effective, but should still have a low-impedance path to the supply rails. In many mixed-signal ICs, separation of the analog and digital supplies and grounds is critical to prevent digital noise from appearing on the analog signals ...
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... When the ISL59911 is first powered up, the offset error is undefined until an offset calibration is performed. The output offset voltage of the ISL59911 also varies as the filter and gain settings are adjusted. To minimize offset, always perform an offset calibration after finalizing the filter and gain settings. ...
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... Power Dissipation The ISL59911 is designed to operate with ±5V supply voltages. The supply currents are tested in production and guaranteed to be less than 140mA per channel. Operating at ±5V power supply, the total power dissipation is shown by Equation 1: × × MAX S SMAX ...
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... The bus is nominally inactive, with SDA and SCL high. Communication begins when the host issues a START command by taking SDA low while SCL is high (Figure 14). The ISL59911 continuously monitors the SDA and SCL lines for the start condition and does not respond to any command until this condition has been met ...
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... DATA CHANGE FIGURE 16. VALID DATA CHANGES ON THE SDA BUS Signals the beginning of serial I/O R/W ISL59911 Device Select Address Write The first 7 bits of the first byte select the ISL59911 on the 2-wire 0 1 ADDR1 ADDR0 bus at the address set by the ADDR0 and ADDR1 pins. The R/W bit indicating that the next transaction will be a write ...
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... ISL59911 Signals the beginning of serial I/O R/W ISL59911 Device Select Address Write The first 7 bits of the first byte select the ISL59911 on the 2-wire 0 1 ADDR1 ADDR0 bus at the address set by the ADDR0 and ADDR1 pins. R indicating that the next transaction will be a write. ...
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... For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL59911 To report errors or suggestions for this datasheet, please go to FITs are available from our website at http://rel.intersil.com/reports/search.php 16 ISL59911 CHANGE www.intersil.com/askourstaff www.intersil.com/products for a FN7548.0 September 2, 2011 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 17 ISL59911 L32.5x6C 32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE (COMPLIANT TO JEDEC MO-220) ...