isl59911 Intersil Corporation, isl59911 Datasheet - Page 14

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isl59911

Manufacturer Part Number
isl59911
Description
250mhz Triple Differential Receiver/ Equalizer With I 2c Interface
Manufacturer
Intersil Corporation
Datasheet

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Configuration Register Write
Figure 17 shows two views of the steps necessary to write one or
more words to the Configuration Register.
Signals from
the Host
SDA Bus
Signals from
the ISL59911
A7
D7
1
A6
D6
0
R
A5
D5
S
T
A
T
ISL59911 Serial Bus
0
a a a a a a a 0
Serial Bus
Address
(Repeat if desired)
START Command
SDA
SCL
STOP Command
14
A4
D4
0
A
C
K
A3
D3
AAAAAAAA
1
Register
Address
FIGURE 17. CONFIGURATION REGISTER WRITE
FIGURE 16. VALID DATA CHANGES ON THE SDA BUS
ADDR1 ADDR0
DATA STABLE
A2
D2
A
C
K
d d d d d d d d
A1
D1
Write*
Data
ISL59911
R/W
DATA CHANGE
A0
D0
0
C
A
K
S
O
P
T
Signals the beginning of serial I/O
ISL59911 Register Data Write(s)
This is the data to be written to the ISL59911’s Configuration
Register. Note: The ISL59911 Configuration Register’s address
pointer auto-increments after each data write. Repeat this step to
write multiple sequential bytes of data to the Configuration Register.
ISL59911 Device Select Address Write
The first 7 bits of the first byte select the ISL59911 on the 2-wire
bus at the address set by the ADDR0 and ADDR1 pins. The
R/W bit is a 0, indicating that the next transaction will be a write.
ISL59911 Register Address Write
This is the address of the ISL59911’s Configuration Register
that the following byte will be written to.
Signals the ending of serial I/O
* The Data Write step can be repeated to write to the
ISL59911’s Configuration Register sequentially, beginning at
the Register Address written in the previous step.
DATA STABLE
September 2, 2011
FN7548.0

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