SST89V54RD2 Silicon Storage Technology, Inc., SST89V54RD2 Datasheet - Page 55

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SST89V54RD2

Manufacturer Part Number
SST89V54RD2
Description
Flashflex51 Mcu
Manufacturer
Silicon Storage Technology, Inc.
Datasheet

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FlashFlex MCU
SST89V54RD2/RD / SST89V58RD2/RD
TABLE
9.4 Read Operation Under Lock Condition
The status of security bits SB1, SB2, and SB3 can be read
when the read command is disabled by security lock.
There are three ways to read the status.
©2007 Silicon Storage Technology, Inc.
1. External host mode: Read-back = 00H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = FFH (blank)
Level
1. P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1).
2. SFST[7:5] = Security Lock Status Bits (SB1_i, SB2_i, SB3_i)
1
2
3
4
9-1: Security Lock Options
SFST[7:5]
000
100
011
101
010
110
001
111
Security Lock Bits
SB1
U
U
U
U
P
P
P
P
SB2
U
U
P
U
P
P
U
P
1
1,2
SB3
U
U
P
P
U
U
P
P
1
Unlock
SoftLock
Hard Lock
SoftLock
Hard Lock
Hard Lock
Block 1
Security Status of:
55
Unlock
SoftLock
Hard Lock
SoftLock
SoftLock
Hard Lock
Block 0
Security Type
No Security Features are Enabled.
MOVC instructions executed from
external program memory are dis-
abled from fetching code bytes from
internal memory, EA# is sampled and
latched on Reset, and further pro-
gramming of the flash is disabled.
Level 2 plus Verify disabled, both
blocks locked.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0 and vice
versa.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0.
Same as Level 3 hard lock/hard lock,
but MCU will start code execution
from the internal memory regardless
of EA#.
S71255-10-000
Data Sheet
T9-1.0 1255
12/07

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