ad5331bru-reel7 Analog Devices, Inc., ad5331bru-reel7 Datasheet - Page 15

• Manufacturer Part Number: ad5331bru-reel7
• Description: 2.5 V To 5.5 V, 115 Ua, Parallel Interface Single Voltage-output 8-/10-/12-bit Dacs
• Manufacturer: Analog Devices, Inc.

The low data byte of the AD5341 consists of data bits 0 to 7 at
data inputs DB
bits 8 to 11 at data inputs DB
DB
be used for data to set up the reference input as buffered/
unbuffered, and buffer amplifier gain. See Figure 33.
POWER-ON RESET
The AD5330/AD5331/AD5340/AD5341 are provided with a
power-on reset function, so that they power up in a defined state.
The power-on state is:
• Normal Operation
• Reference Input Unbuffered
• 0 – V
• Output Voltage Set to 0 V
Both input and DAC registers are filled with zeros and remain so
until a valid write sequence is made to the device. This is
particularly useful in applications where it is important to know
the state of the DAC outputs while the device is powering up.
POWER-DOWN MODE
The AD5330/AD5331/AD5340/AD5341 have low power con-
sumption, dissipating only 0.35 mW with a 3 V supply and
0.7 mW with a 5 V supply. Power consumption can be further
CLR
1
1
0
1
1
1
X = don’t care.
CLR
1
1
0
1
1
1
1
1
X = don’t care.
4
to DB
REF
Output Range
7
are ignored during a high-byte write, but they may
LDAC
1
1
X
1
1
0
0
0
X = UNUSED BIT
0
DB7
X
to DB
LDAC
1
1
X
1
0
0
DB6
X
7
DB5
, while the high byte consists of data
X
CS
1
X
X
0
0
0
0
X
HIGH BYTE
LOW BYTE
DB4
0
X
to DB
DB11
DB3
CS
1
X
X
0
0
X
DB10
3
DB2
as shown in Figure 29.
WR
X
1
X
0➝1
0➝1
0➝1
0➝1
X
DB9
DB1
Table I. AD5330/AD5331/AD5340 Truth Table
DB8
DB0
Table II. AD5341 Truth Table
WR
X
1
X
0➝1
0➝1
X
HBEN
X
X
X
0
1
0
1
X
Function
No Data Transfer
No Data Transfer
Clear All Registers
Load Low-Byte Input Register
Load High-Byte Input Register
Load Low-Byte Input Register and DAC Register
Load High-Byte Input Register and DAC Register
Update DAC Register
reduced when the DAC is not in use by putting it into power-
down mode, which is selected by taking pin PD low.
When the PD pin is high, the DAC works normally with a
typical power consumption of 140 µA at 5 V (115 µA at 3 V).
In power-down mode, however, the supply current falls to
200 nA at 5 V (80 nA at 3 V) when the DAC is powered-down.
Not only does the supply current drop, but the output stage is
also internally switched from the output of the amplifier mak-
ing it open-circuit. This has the advantage that the output is
three-state while the part is in power-down mode and pro-
vides a defined input condition for whatever is connected to
the output of the DAC amplifier. The output stage is illus-
trated in Figure 30.
The bias generator, the output amplifier, the resistor string,
and all other associated linear circuitry are shut down when
the power-down mode is activated. However, the contents
of the registers are unaffected when in power-down. The time
to exit power-down is typically 2.5 µs for V
when V
PD pin to when the output voltage deviates from its power-
down voltage. See Figure 22.
Function
No Data Transfer
No Data Transfer
Clear All Registers
Load Input Register
Load Input Register and DAC Register
Update DAC Register
AD5330/AD5331/AD5340/AD5341
DD
STRING DAC
RESISTOR
= 3 V. This is the time from a rising edge on the
AMPLIFIER
POWER-DOWN
CIRCUITRY
DD
= 5 V and 5 µs
V
OUT