ltc4269cdkd-2 Linear Technology Corporation, ltc4269cdkd-2 Datasheet - Page 25

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ltc4269cdkd-2

Manufacturer Part Number
ltc4269cdkd-2
Description
Ieee 802.3at High Power Pd And Synchronous Forward Controller With Aux Support
Manufacturer
Linear Technology Corporation
Datasheet

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APPLICATIONS INFORMATION
compensation requirements. Current mode switching
regulators which operate with duty cycles above 50%
and have continuous inductor current must add slope
compensation to their current sensing loop to prevent
subharmonic oscillations. (For more information on slope
compensation, see Application Note 19.) The LTC4269-2
has programmable slope compensation to allow a wide
range of inductor values, to reduce susceptibility to PCB
generated noise and to optimize loop bandwidth. The
LTC4269-2 programs slope compensation by inserting a
resistor, R
The LTC4269-2 generates a current at the I
is linear from 0% duty cycle to the maximum duty cycle
of the OUT pin. A simple calculation of I
gives an added ramp to the voltage at the I
programmable slope compensation. (See both graphs
I
Threshold vs Duty Cycle in the Typical Performance
Characteristics section.)
Programming Synchronous Rectifi er Timing:
SOUT to OUT delay (‘t
The LTC4269-2 has an additional output SOUT which pro-
vides a ±50mA peak drive clamped to 12V. In applications
requiring synchronous rectifi cation for high effi ciency, the
LTC4269-2 SOUT provides a sync signal for secondary
side control of the synchronous rectifi er MOSFETs (Fig-
ure 14). Timing delays through the converter can cause
non-optimum control timing for the synchronous rectifi er
MOSFETs. The LTC4269-2 provides a programmable delay
(t
rising edge to optimize timing control for the synchronous
rectifi er MOSFETs to achieve maximum effi ciency gains.
A resistor R
SENSE
DELAY
LTC4269-2
CURRENT SLOPE = 35μA • DC
I
SENSE
, Figure 14) between SOUT rising edge and OUT
Pin Current vs Duty Cycle and I
OUT
OC
Figure 13. Programming Slope Compensation
SLOPE
DELAY
R
SLOPE
, in series with the I
connected from the DELAY pin to GND
V
R
42692 F13
SOURCE
S
DELAY
’)
V
I
DC = DUTY CYCLE
FOR SYNC OPERATION
I
k = f
SENSE
SENSE(SYNC)
(ISENSE)
OSC
= 8μA + 35DC μA
/f
SENSE
SYNC
= V
SOURCE
= 8μA + (k • 35DC)μA
SENSE
pin (Figure 13).
SENSE
SENSE
+ (I
SENSE
SENSE
Maximum
pin which
• R
• R
pin for
SLOPE
SLOPE
)
sets the value of t
from 10ns with R
(see graph in Typical Performance Characteristics)
Programming Maximum Duty Cycle Clamp
For forward converter applications, a maximum switch
duty cycle clamp which adapts to transformer input volt-
age is necessary for reliable control of the MOSFETs. This
volt-second clamp provides a safeguard for transformer
reset that prevents transformer saturation. The LTC4269-2
SD_V
programmable volt-second clamp solution using simple
resistor ratios (Figure 15).
An increase of voltage at the SD_V
maximum duty cycle clamp to decrease. Deriving SD_V
from a resistor divider connected to system input voltage
creates the volt-second clamp. The maximum duty cycle
clamp can be adjusted by programming voltage on the
SS_MAXDC pin using a resistor divider from V
increase of voltage at the SS_MAXDC pin causes the
maximum duty cycle clamp to increase.
Figure 14. Programming SOUT and OUT Delay: t
Figure 15. Programming Maximum Duty Cycle Clamp
SEC
CLAMP INPUT
DUTY CYCLE
SOUT
OUT
and SS_MAXDC pins provide a capacitor-less,
ADAPTIVE
t
*MINIMUM ALLOWABLE R
DELAY
DELAY
GUARANTEE SOFT-START PULL-OFF
POWER SUPPLY
INPUT VOLTAGE
DELAY
= 10k to 160ns with R
. Typical values for t
R1
R2
R
LTC4269-2
B
R
T
DELAY
*
T
MAX DUTY CYCLE
CLAMP ADJUST INPUT
42692 F14
IS 10k TO
SD_V
SS_MAXDC
V
LTC4269-2
REF
SEC
LTC4269-2
SEC
pin causes the
R
DELAY
42692 F15
DELAY
DELAY
DELAY
REF
25
= 160k.
range
. An
42692f
SEC

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