mg82fel308 Megawin Technology, mg82fel308 Datasheet - Page 24

• Manufacturer Part Number: mg82fel308
• Description: A Single-chip Microcontroller Based On A High Performance 1-t Architecture 80c51
• Manufacturer: Megawin Technology

9. Dual Data Pointer Register (DPTR)
The dual DPTR structure as shown in Fig9-1 is a way by which the chip can specify the address of an external
data memory location. There are two 16-bit DPTR registers that address the external memory, and a single bit
called DPS (AUXR1.0) that allows the program code to switch between them.
Fig9-1 Dual DPTR
DPTR Instructions
The six instructions that refer to DPTR currently selected using the DPS bit are as follows:
AUXR1: Auxiliary Control Register 1
SFR Address
SFR Page
Bit 0: DPTR select bit, used to switch between DPTR0 and DPTR1.
0: Select DPTR0.
1: Select DPTR1.
This document information is the intellectual property of Megawin Technology.
© Megawin Technology Co., Ltd. 2009 All rights reserved.
QP-7300-03D
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GPWKS1
INC DPTR
MOV DPTR,#data16 ; Loads the DPTR with a 16-bit constant
MOV A,@A+DPTR
MOVX A,@DPTR
MOVX @DPTR,A
JMP @A+DPTR
DPTR0
DPTR1
R/W
7
MEGAWIN
MAKE YOU WIN
GPWKS0
(83h)
DPH
DPH
= 0xA2
= All
R/W
6
DPS
0
1
(82h)
DPL
DPL
P5PWM
; Increments the data pointer by 1
; Move code byte relative to DPTR to ACC
; Move external RAM (16-bit address) to ACC
; Move ACC to external RAM (16-bit address)
; Jump indirect relative to DPTR
R/W
5
AUXR1.DPS=0
AUXR1.DPS=1
Selected DPTR
DPTR0
DPTR1
P1S0
R/W
4
Reset Value = 0000-0xx0
External Data Memory
GF2
R/W
3
R/W
GF
2
MG82FE(L)308/316
R/W
GF
1
Preliminary, v 0.04
DPS
R/W
0