mt46h16m16lf Micron Semiconductor Products, mt46h16m16lf Datasheet - Page 26

• Manufacturer Part Number: mt46h16m16lf
• Description: 256mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Operations
Bank/Row Activation
Figure 11:
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 3/08 EN
Activating a Specific Row in a Specific Bank
Notes:
Before any READ or WRITE commands can be issued to a bank within the Mobile DDR
SDRAM, a row in that bank must be “opened.” This is accomplished via the ACTIVE
command, which selects both the bank and the row to be activated, as shown in
Figure 11.
After a row is opened with an ACTIVE command, a READ or WRITE command may be
issued to that row, subject to the
the clock period and rounded up to the next whole number to determine the earliest
clock edge after the ACTIVE command on which a READ or WRITE command can be
entered. For example, a
results in 2.7 clocks rounded to 3. This is reflected in Figure 12 on page 27, which covers
any case where 2 <
the same procedure is used to convert other specification limits from time units to clock
cycles.)
A subsequent ACTIVE command to a different row in the same bank can only be issued
after the previous active row has been “closed” (precharged). The minimum time
interval between successive ACTIVE commands to the same bank is defined by
A subsequent ACTIVE command to another bank can be issued while the first bank is
being accessed, which results in a reduction of total row-access overhead. The minimum
time interval between successive ACTIVE commands to different banks is defined by
t
BA0, BA1
1. RA = row address
2. BA = bank address
RRD.
A0–A12
RAS#
CAS#
WE#
CK#
CKE
CS#
CK
HIGH
BA
RA
t
RCD (MIN)/
t
RCD specification of 20ns with a 133 MHz clock (7.5ns period)
26
t
t
CK ≤ 3. (Figure 12 also shows the same case for
RCD specification.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
t
RCD (MIN) should be divided by
©2005 Micron Technology, Inc. All rights reserved.
Operations
t
RC.
t
RRD;