pcf2104 NXP Semiconductors, pcf2104 Datasheet - Page 5

• Manufacturer Part Number: pcf2104
• Description: Pcf2104x Lcd Controller/driver
• Manufacturer: NXP Semiconductors

Philips Semiconductors
6
7
7.1
RS selects the register to be accessed for read and write
when the device is controlled by the parallel interface.
RS = logic 0 selects the instruction register for write and
the Busy Flag and Address Counter for read. RS = logic 1
selects the data register for both read and write. There is
an internal pull-up on pin RS.
7.2
R/W selects either the read (R/W = logic 1) or write
(R/W = logic 0) operation when control is by the parallel
interface. There is an internal pull-up on this pin.
7.3
The E pin is set HIGH to signal the start of a read or write
operation when the device is controlled by the parallel
interface. Data is clocked in or out of the chip on the
negative edge of the clock. Note that this pin must be tied
to logic 0 (V
1997 Dec 16
OSC
V
SA0
V
R8 to R5
R32 to R29
R24 to R17
C60 to C1
R9 to R16
R25 to R28
R1 to R4
SCL
E
RS
R/W
T1
DB7 to DB0
SDA
V
DD
SS
LCD
LCD controller/driver
PINNING
PIN FUNCTIONS
RS: register select (parallel control)
R/W: read/write (parallel control)
E: data bus clock (parallel control)
SYMBOL
SS
) when I
2
C-bus control is used.
102 to 109
FFC PAD
13 to 20
21 to 80
81 to 88
89 to 92
93 to 96
9 to12
5 to 8
100
101
110
111
97
98
99
1
2
3
4
TYPE
I/O
I/O
O
O
O
O
O
O
O
P
P
I
I
I
I
I
I
I
I
5
7.4
The bidirectional, 3-state data bus transfers data between
the system controller and the PCF2104x. DB7 may be
used as the Busy Flag, signalling that internal operations
are not yet completed. In 4-bit operations the 4 higher
order lines DB4 to DB7 are used; DB0 to DB3 must be left
open circuit. There is an internal pull-up on each of the
data lines. Note that these pins must be left open circuit
when I
7.5
These pins output the data for pairs of columns.
This arrangement permits optimized chip-on-glass (COG)
layout for 4-line by 12 characters.
7.6
These pins output the row select waveforms to the left and
right halves of the display.
7.7
Negative power supply for the liquid crystal display.
2
DB0 to DB7: data bus (parallel control)
C1 to C60: column driver outputs
R1 to R32: row driver outputs
V
C-bus control is used.
LCD
oscillator/external clock input
logic supply voltage
I
ground
LCD row driver outputs
LCD row driver outputs
LCD row driver outputs
LCD column driver outputs
LCD row driver outputs
LCD row driver outputs
LCD row driver outputs
I
data bus clock input
register select input
read/write input
test pad input
8-bit bidirectional data bus input/output
I
LCD supply voltage input
2
2
2
C-bus address pin input
C-bus serial clock input
C-bus serial data input/output
: LCD power supply
DESCRIPTION
Product specification
PCF2104x