pca8576d NXP Semiconductors, pca8576d Datasheet

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pca8576d

Manufacturer Part Number
pca8576d
Description
Automotive 40 X 4 Lcd Segment Driver For Low Multiplex Rates Up To 1 4
Manufacturer
NXP Semiconductors
Datasheet
1. General description
2. Features and benefits
The PCA8576D is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD) with low multiplex rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily
cascaded for larger LCD applications. The PCA8576D is compatible with most
microcontrollers and communicates via the two-line bidirectional I
overheads are minimized by a display RAM with auto-incremented addressing, by
hardware subaddressing and by display memory switching (static and duplex drive
modes).
PCA8576D
Automotive 40 x 4 LCD segment driver for low multiplex rates
up to 1:4
Rev. 1 — 4 April 2011
AEC-Q100 compliant for automotive applications
Single chip LCD controller and driver
Selectable backplane drive configuration: static or 2, 3, 4 backplane multiplexing
Selectable display bias configuration: static,
Internal LCD bias generation with voltage-follower buffers
40 segment drives:
40  4-bit RAM for display data storage
Auto-incremented display data loading across device subaddress boundaries
Display memory bank switching in static and duplex drive modes
Versatile blinking modes
Independent supplies possible for LCD and logic voltages
Wide power supply range: from 1.8 V to 5.5 V
Wide logic LCD supply range:
Low power consumption
400 kHz I
May be cascaded for large LCD applications (up to 2560 elements possible)
No external components required
Compatible with chip-on-glass and chip-on-board technology
Manufactured in silicon gate CMOS process
Up to 20 7-segment numeric characters
Up to 10 14-segment alphanumeric characters
Any graphics of up to 160 elements
From 2.5 V for low-threshold LCDs
Up to 6.5 V for high-threshold twisted nematic LCDs
2
C-bus interface
1
2
or
1
3
2
C-bus. Communication
Product data sheet

Related parts for pca8576d

pca8576d Summary of contents

Page 1

... Rev. 1 — 4 April 2011 1. General description The PCA8576D is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and segments. It can be easily cascaded for larger LCD applications ...

Page 2

... CLOCK SELECT AND TIMING SYNC OSC OSCILLATOR V DD SCL INPUT FILTERS SDA Fig 1. Block diagram of PCA8576D PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates Ordering information Package Name Description [1] bare die 59 bumps Marking codes BP0 BP2 ...

Page 3

... Viewed from active side. C1 and C2 are alignment marks. For mechanical details, see Pinning diagram for PCA8576DU (bare die) All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D PCA8576DU ...

Page 4

... LCD backplane outputs LCD segment outputs All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D C-bus serial data input and output C-bus serial clock input C-bus address input; bit 0 and should be electrically isolated. SS © NXP B.V. 2011. All rights reserved. ...

Page 5

... LCDs. It can directly drive any static or multiplexed LCD containing up to four backplanes and segments. The possible display configurations of the PCA8576D depend on the number of active backplane outputs required. A selection of display configurations is shown in of these configurations can be implemented in the typical system shown in Table 4 ...

Page 6

... V LCD 2    All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D and V . The middle resistor can be LCD     off RMS on RMS ------------------------ - ----------------------- - V V LCD LCD 0 1 0.354 ...

Page 7

... V are properties of the display driver and are affected by the selection off(RMS) Equation 1 to Equation 3) and the V All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D to V and is determined from off(RMS)  2.449V =   ...

Page 8

... LCD liquid and can be provided by the module high 100 % OFF SEGMENT Electro-optical characteristic: relative transmission curve of the liquid All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D V [V] V RMS low high GREY ON SEGMENT SEGMENT 001aam358 © ...

Page 9

... LCD (t)  (t). state2 Sn+1 BP0 = 0 V. off(RMS) Static drive mode waveforms All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D T fr LCD segments state 1 state 2 (on) (off) mgl745 © NXP B.V. 2011. All rights reserved. Figure ...

Page 10

... LCD (t)  (t). state2 Sn+1 BP1 = 0.354V . off(RMS) LCD Waveforms for the 1:2 multiplex drive mode with All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D   bias or bias as shown LCD segments state 1 state 2 (a) Waveforms at driver ...

Page 11

... V (t). state2 Sn+1 BP1 = 0.333V . off(RMS) LCD Waveforms for the 1:2 multiplex drive mode with All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D T fr LCD segments state 1 state 2 (a) Waveforms at driver. (b) Resultant waveforms mgl747 at LCD segment.  1 bias 3 © ...

Page 12

... V ( (t). state2 Sn+1 BP1 = 0.333V . off(RMS) LCD Waveforms for the 1:3 multiplex drive mode with All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D T fr LCD segments state 1 state 2 (b) Resultant waveforms mgl748 at LCD segment.  1 bias 3 © ...

Page 13

... V (t). state2 Sn+1 BP1 = 0.333V . off(RMS) LCD Waveforms for the 1:4 multiplex drive mode with All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D T fr state 1 state 2 mgl749 at LCD segment.  1 bias 3 © NXP B.V. 2011. All rights reserved. LCD segments ...

Page 14

... NXP Semiconductors 7.5 Oscillator 7.5.1 Internal clock The internal logic of the PCA8576D and its LCD drive signals are timed either by its internal oscillator external clock. The internal oscillator is enabled by connecting pin OSC to pin V as the clock signal for several PCA8576D in the system that are connected in cascade. ...

Page 15

... BP0, BP1, BP2 and BP3 respectively. Fig 10. Display RAM bit map When display data is transmitted to the PCA8576D, the display bytes received are stored in the display RAM in accordance with the selected LCD drive mode. The data is stored as it arrives and does not wait for an acknowledge cycle as with the commands. Depending on the current multiplex drive mode, data is stored singularly, in pairs, triplets or quadruplets ...

Page 16

LCD segments LCD backplanes S a n+2 BP0 n+3 n+1 static n+5 n n+6 BP0 1 ...

Page 17

... PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates Figure 11: Section All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D Section 7.17). Figure 11. 7.17). If the contents of the © NXP B.V. 2011. All rights reserved ...

Page 18

... The SYNC signal resets these sequences to the following starting points: row 3 for 1:4 multiplex, row 2 for 1:3 multiplex, row 1 for 1:2 multiplex and row 0 for static mode. The PCA8576D includes a RAM bank switching feature in the static and 1:2 multiplex drive modes. In the static drive mode, the bank-select command may request the contents of row selected for display instead of the contents of row 0 ...

Page 19

... Section 11). clk 2 C-bus SDA SCL data line stable; data valid All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D Nominal blink frequency blinking off 0.5 Hz Figure 12). change of data allowed mba607 © NXP B.V. 2011. All rights reserved. ...

Page 20

... Automotive LCD segment driver for low multiplex rates Figure 13). S START condition MASTER SLAVE TRANSMITTER/ RECEIVER RECEIVER All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D P STOP condition Figure 14). SLAVE MASTER TRANSMITTER/ TRANSMITTER RECEIVER SDA SCL ...

Page 21

... SDA and SCL lines. 2 7.16.7 I C-bus protocol 2 Two I C-bus slave addresses (0111 000 and 0111 001) are reserved for the PCA8576D. The PCA8576D slave address is illustrated in Table 7. Bit PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates ...

Page 22

... NXP Semiconductors The least significant bit of the slave address that a PCA8576D will respond to is defined by the level tied to its SA0 input. The PCA8576D is a write-only device and will not respond to a read access. Having two reserved slave addresses allows the following on the same I • ...

Page 23

... NXP Semiconductors 7.17 Command decoder The command decoder identifies command bytes that arrive on the I commands available to the PCA8576D are defined in Table 8. Command Bit mode-set load-data-pointer device-select bank-select blink-select [1] Not used. All available commands carry a continuation bit C in their most significant bit position as shown in arrive will also represent a command ...

Page 24

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D [1] 1:2 multiplex RAM bits 0 and 1 RAM bits 2 and 3 RAM bits 0 and 1 RAM bits 2 and 3 [1] [2] © NXP B.V. 2011. All rights reserved ...

Page 25

... A0 LCD BP0, BP1, BP2, BP3 LCD S0 to S39 V SS All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D SCL V SS SDA LCD V SS mdb076 © NXP B.V. 2011. All rights reserved ...

Page 26

... MM latch-up current storage temperature ambient temperature operating device Ref. 8 “JESD78” All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D ) is off, or vice versa. This may cause unwanted DD and V must be applied or removed together. LCD DD Min 0.5 0.5  ...

Page 27

... LCD 3 [2] LCD outputs are open-circuit; inputs [3] The I C-bus interface of PCA8576D tolerant. 2 [4] When tested pins SCL and SDA have no diode to V [5] Propagation delay of driver between clock (CLK) and LCD driving signals. [6] Periodically sampled, not 100 % tested. ...

Page 28

... LCD amb Conditions LCD = 400 kHz SCL f < 125 kHz SCL 2 on the I C-bus . All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D  +85 C; unless otherwise specified. Min Typ [1] 1440 1850 960 - ...

Page 29

... CLK SYNC t PD(SYNC_N) t SYNC_NL t PD(drv BUF LOW t HD;STA C-bus timing waveforms All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D t clk( HD;DAT t HIGH t SU;STA © NXP B.V. 2011. All rights reserved ...

Page 30

... SYNC can be either an input or an output signal; a SYNC output is implemented as an open-drain driver with an internal pull-up resistor. The PCA8576D asserts SYNC at the start of its last active backplane signal and monitors the SYNC line at all other times. If cascade synchronization is lost restored by the first PCA8576D to assert SYNC ...

Page 31

... The maximum SYNC contact resistance allowed for the number of devices in cascade is given in Table 19. Number of devices The PCA8576D can be cascaded with the PCA8534A. This allows optimal drive selection for a given number of pixels to display. synchronization signals. V LCD V DD MICRO- ...

Page 32

... NXP Semiconductors Fig 22. Synchronization of the cascade for the various PCA8576D drive modes 12.2 RAM writing in 1:3 multiplex drive mode In 1:3 multiplex drive mode, the RAM is written as shown in well). Table 20. Assumption: BP2/S2, BP2/S5, BP2/S8 etc. are not connected to any elements on the display. Display RAM bits (rows)/ ...

Page 33

... Table 21 the RAM has to be written entirely and BP2/S2, BP2/S5, All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D b1/c7 c4 c1/d7 d4 d1/e7 e4 b0/c6 c3 c0/d6 d3 d0/ © NXP B.V. 2011. All rights reserved. ...

Page 34

... Bare die; 59 bumps 35 ( Notes 1. Marking code: PC8576D-2 Outline version IEC PCA8576DU/2DA Fig 23. Bare die outline PCA8576DU/2DA/2 (for dimensions see PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates detail ...

Page 35

... S10 S11 S12 PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates Dimensions of PCA8576DU 0.40 0.015 0.381 - - - Bump location for PCA8576DU Figure 2 and Figure Bump X (m) Y (m) 34.38 876.6 1 876.6 2 109.53 876.6 3 181.53 876.6 4 365.58 876.6 5 469.08  ...

Page 36

... All x/y coordinates represent the position of the center of each alignment mark with respect to the center (x the chip (see Symbol C1 C2 PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates Bump location for PCA8576DU Figure 2 and Figure Bump X (m) Y (m) 402.03 31 876 ...

Page 37

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D x,1 B x,y E mce404 Value 5 ...

Page 38

... Machine Model Most Significant Bit Printed Circuit Board Random Access Memory Root Mean Square Serial CLock line Serial DAta line All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D PC8576D mdb080 © NXP B.V. 2011. All rights reserved ...

Page 39

... NX3-00092 — NXP store and transport requirements [11] UM10204 — I 19. Revision history Table 27. Revision history Document ID Release date PCA8576D v.1 20110404 PCA8576D Product data sheet Automotive LCD segment driver for low multiplex rates 2 C-bus specification and user manual Data sheet status Product data sheet All information provided in this document is subject to legal disclaimers ...

Page 40

... All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D © NXP B.V. 2011. All rights reserved ...

Page 41

... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 1 — 4 April 2011 PCA8576D © NXP B.V. 2011. All rights reserved ...

Page 42

... RAM writing in 1:3 multiplex drive mode . . . . 32 Test information . . . . . . . . . . . . . . . . . . . . . . . 33 Quality information . . . . . . . . . . . . . . . . . . . . . 33 Bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 34 Handling information . . . . . . . . . . . . . . . . . . . 37 Packing information . . . . . . . . . . . . . . . . . . . . 37 Tray information . . . . . . . . . . . . . . . . . . . . . . . 37 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 38 References Revision history . . . . . . . . . . . . . . . . . . . . . . . 39 Legal information . . . . . . . . . . . . . . . . . . . . . . 40 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 40 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Contact information . . . . . . . . . . . . . . . . . . . . 41 Contents Date of release: 4 April 2011 Document identifier: PCA8576D All rights reserved. ...

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