pca8576d NXP Semiconductors, pca8576d Datasheet - Page 22

• Manufacturer Part Number: pca8576d
• Description: Automotive 40 X 4 Lcd Segment Driver For Low Multiplex Rates Up To 1 4
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA8576D
Product data sheet
The least significant bit of the slave address that a PCA8576D will respond to is defined
by the level tied to its SA0 input. The PCA8576D is a write-only device and will not
respond to a read access. Having two reserved slave addresses allows the following on
the same I
The I
condition (S) from the I
slave addresses available. All PCA8576D whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I
ignored by all PCA8576D whose SA0 inputs are set to the alternative level.
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCA8576D.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see
PCA8576D on the bus.
After the last command byte, one or more display data bytes may follow. Display data
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically updated
and the data directed to the intended PCA8576D device.
An acknowledgement after each byte is asserted only by the PCA8576D that are
addressed via address lines A0, A1 and A2. After the last display byte, the I
asserts a STOP condition (P). Alternately a START may be asserted to restart an I
access.
Fig 16. I
Fig 17. Format of command byte
•
•
Up to 16 PCA8576D for very large LCD applications
The use of two types of LCD multiplex drive modes.
2
C-bus protocol is shown in
2
S
2
C-bus protocol
Figure
C-bus:
0 1 1 1 0 0
slave address
All information provided in this document is subject to legal disclaimers.
17). The command bytes are also acknowledged by all addressed
1 byte
2
Automotive 40 x 4 LCD segment driver for low multiplex rates
C-bus master which is followed by one of two possible PCA8576D
Rev. 1 — 4 April 2011
S
A
0
R/W
MSB
0 A C
C
Figure
acknowledge by
all addressed
n ≥ 1 byte(s)
PCA8576D
COMMAND
REST OF OPCODE
16. The sequence is initiated with a START
A
msa833
DISPLAY DATA
n ≥ 0 byte(s)
LSB
by A0, A1 and A2
update data pointers
subaddress counter
PCA8576D
PCA8576D only
and if necessary,
acknowledge
selected
2
C-bus transfer is
© NXP B.V. 2011. All rights reserved.
A
013aaa470
2
P
C-bus master
2
C-bus
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