pca85232 NXP Semiconductors, pca85232 Datasheet - Page 17

• Manufacturer Part Number: pca85232
• Description: Pca85232 Lcd Driver For Low Multiplex Rates
• Manufacturer: NXP Semiconductors

NXP Semiconductors
PCA85232
Product data sheet
7.10 Display RAM
7.8 Segment outputs
7.9 Backplane outputs
The LCD drive section includes 160 segment outputs (S0 to S159) which must be
connected directly to the LCD. The segment output signals are generated in accordance
with the multiplexed backplane signals and with data resident in the display register.
When less than 160 segment outputs are required the unused segment outputs must be
left open-circuit.
The LCD drive section includes four backplane outputs: BP0 to BP3. The backplane
output signals are generated in accordance with the selected LCD drive mode.
If less than four backplane outputs are required the unused outputs can be left
open-circuit.
The pins for the four backplanes BP0 to BP3 are available on both pin bars of the chip. In
applications it is possible to use either the pins for the backplanes
When using all backplanes available they may be connected to the respective sibling
(BP0 on the top pin bar with BP0 on the bottom pin bar and so on).
The display RAM is a static 160 × 4 bit RAM which stores LCD data. There is a one-to-one
correspondence between
A logic 1 in the RAM bitmap indicates the on-state of the corresponding LCD element;
similarly, a logic 0 indicates the off-state.
The display RAM bit map,
backplane outputs BP0 to BP3, and the columns 0 to 159 which correspond with the
segment outputs S0 to S159. In multiplexed LCD applications the segment data of the
first, second, third, and fourth row of the display RAM are time-multiplexed with BP0,
BP1, BP2, and BP3 respectively.
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In the 1:4 multiplex drive mode BP0 to BP3 must be connected directly to the LCD.
In 1:3 multiplex drive mode BP3 carries the same signal as BP1, therefore these two
adjacent outputs can be tied together to give enhanced drive capabilities.
In 1:2 multiplex drive mode BP0 and BP2, BP1 and BP3 respectively carry the same
signals and may also be paired to increase the drive capabilities.
In static drive mode the same signal is carried by all four backplane outputs and they
can be connected in parallel for very high drive requirements.
on the top pin bar
on the bottom pin bar
or both of them to increase the driving strength of the device.
the bits in the RAM bitmap and the LCD elements
the RAM columns and the segment outputs
the RAM rows and the backplane outputs.
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 8 December 2010
Figure
11, shows the rows 0 to 3 which correspond with the
LCD driver for low multiplex rates
PCA85232
© NXP B.V. 2010. All rights reserved.
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